Merge tag 'u-boot-imx-20191009' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

[oweals/u-boot.git] / arch / arm / dts / zynq-7000.dtsi

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 7ef102ad05cdf4acf171c47d886f09c5652d0462..e1b0816a3459cb340784a07a1bb47aaf9f93e950 100644 (file)
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Xilinx Zynq 7000 DTSI
  * Describes the hardware common to all Zynq 7000-based boards.
  *
  *  Copyright (C) 2011 - 2015 Xilinx
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 / {
@@ -236,7 +235,7 @@
                        #size-cells = <0>;
                };
 
-               sdhci0: sdhci@e0100000 {
+               sdhci0: mmc@e0100000 {
                        compatible = "arasan,sdhci-8.9a";
                        status = "disabled";
                        clock-names = "clk_xin", "clk_ahb";
@@ -246,7 +245,7 @@
                        reg = <0xe0100000 0x1000>;
                };
 
-               sdhci1: sdhci@e0101000 {
+               sdhci1: mmc@e0101000 {
                        compatible = "arasan,sdhci-8.9a";
                        status = "disabled";
                        clock-names = "clk_xin", "clk_ahb";
@@ -324,6 +323,11 @@
                        syscon = <&slcr>;
                };
 
+               efuse: efuse@f800d000 {
+                       compatible = "xlnx,zynq-efuse";
+                       reg = <0xf800d000 0x20>;
+               };
+
                global_timer: timer@f8f00200 {
                        compatible = "arm,cortex-a9-global-timer";
                        reg = <0xf8f00200 0x20>;