Merge git://git.denx.de/u-boot-video

[oweals/u-boot.git] / arch / arm / dts / uniphier-pxs3.dtsi

diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index 76b656652cba2431353e0dbdf0dc1e2d8c6254c4..8944005ac0f65b009509a701a273a68aef1d6a41 100644 (file)
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -4,10 +4,10 @@
  * Copyright (C) 2017 Socionext Inc.
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+        X11
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
-/memreserve/ 0x80000000 0x00080000;
+/memreserve/ 0x80000000 0x02000000;
 
 / {
        compatible = "socionext,uniphier-pxs3";
@@ -40,28 +40,74 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x000>;
+                       clocks = <&sys_clk 33>;
                        enable-method = "psci";
+                       operating-points-v2 = <&cluster0_opp>;
                };
 
                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x001>;
+                       clocks = <&sys_clk 33>;
                        enable-method = "psci";
+                       operating-points-v2 = <&cluster0_opp>;
                };
 
                cpu2: cpu@2 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x002>;
+                       clocks = <&sys_clk 33>;
                        enable-method = "psci";
+                       operating-points-v2 = <&cluster0_opp>;
                };
 
                cpu3: cpu@3 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0 0x003>;
+                       clocks = <&sys_clk 33>;
                        enable-method = "psci";
+                       operating-points-v2 = <&cluster0_opp>;
+               };
+       };
+
+       cluster0_opp: opp_table {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-250000000 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-325000000 {
+                       opp-hz = /bits/ 64 <325000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-500000000 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-650000000 {
+                       opp-hz = /bits/ 64 <650000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-666667000 {
+                       opp-hz = /bits/ 64 <666667000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-866667000 {
+                       opp-hz = /bits/ 64 <866667000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-1000000000 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       clock-latency-ns = <300>;
+               };
+               opp-1300000000 {
+                       opp-hz = /bits/ 64 <1300000000>;
+                       clock-latency-ns = <300>;
                };
        };
 
@@ -136,6 +182,22 @@
                        clock-frequency = <58820000>;
                };
 
+               gpio: gpio@55000000 {
+                       compatible = "socionext,uniphier-pxs3-gpio";
+                       reg = <0x55000000 0x200>;
+                       interrupt-parent = <&aidet>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio-ranges = <&pinctrl 0 0 0>,
+                                     <&pinctrl 96 0 0>,
+                                     <&pinctrl 160 0 0>;
+                       gpio-ranges-group-names = "gpio_range0",
+                                                 "gpio_range1",
+                                                 "gpio_range2";
+               };
+
                i2c0: i2c@58780000 {
                        compatible = "socionext,uniphier-fi2c";
                        status = "disabled";
@@ -169,6 +231,8 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 43 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c2>;
                        clocks = <&peri_clk 6>;
                        clock-frequency = <100000>;
                };
@@ -207,7 +271,7 @@
                        pinctrl-0 = <&pinctrl_system_bus>;
                };
 
-               smpctrl@59800000 {
+               smpctrl@59801000 {
                        compatible = "socionext,uniphier-smpctrl";
                        reg = <0x59801000 0x400>;
                };
@@ -215,7 +279,7 @@
                sdctrl@59810000 {
                        compatible = "socionext,uniphier-pxs3-sdctrl",
                                     "simple-mfd", "syscon";
-                       reg = <0x59810000 0x800>;
+                       reg = <0x59810000 0x400>;
 
                        sd_clk: clock {
                                compatible = "socionext,uniphier-pxs3-sd-clock";
@@ -246,7 +310,6 @@
 
                emmc: sdhc@5a000000 {
                        compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
-                       status = "disabled";
                        reg = <0x5a000000 0x400>;
                        interrupts = <0 78 4>;
                        pinctrl-names = "default";
@@ -255,6 +318,11 @@
                        bus-width = <8>;
                        mmc-ddr-1_8v;
                        mmc-hs200-1_8v;
+                       cdns,phy-input-delay-legacy = <4>;
+                       cdns,phy-input-delay-mmc-highspeed = <2>;
+                       cdns,phy-input-delay-mmc-ddr = <3>;
+                       cdns,phy-dll-delay-sdclk = <21>;
+                       cdns,phy-dll-delay-sdclk-hsmmc = <21>;
                };
 
                sd: sdhc@5a400000 {
@@ -281,9 +349,11 @@
                        };
                };
 
-               aidet@5fc20000 {
-                       compatible = "simple-mfd", "syscon";
+               aidet: aidet@5fc20000 {
+                       compatible = "socionext,uniphier-pxs3-aidet";
                        reg = <0x5fc20000 0x200>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
                };
 
                gic: interrupt-controller@5fe00000 {
@@ -309,10 +379,50 @@
                                compatible = "socionext,uniphier-pxs3-reset";
                                #reset-cells = <1>;
                        };
+
+                       watchdog {
+                               compatible = "socionext,uniphier-wdt";
+                       };
+               };
+
+               usb0: usb@65b00000 {
+                       compatible = "socionext,uniphier-pxs3-dwc3";
+                       status = "disabled";
+                       reg = <0x65b00000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
+                       dwc3@65a00000 {
+                               compatible = "snps,dwc3";
+                               reg = <0x65a00000 0x10000>;
+                               interrupts = <0 134 4>;
+                               dr_mode = "host";
+                               tx-fifo-resize;
+                       };
+               };
+
+               usb1: usb@65d00000 {
+                       compatible = "socionext,uniphier-pxs3-dwc3";
+                       status = "disabled";
+                       reg = <0x65d00000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
+                       dwc3@65c00000 {
+                               compatible = "snps,dwc3";
+                               reg = <0x65c00000 0x10000>;
+                               interrupts = <0 137 4>;
+                               dr_mode = "host";
+                               tx-fifo-resize;
+                       };
                };
 
                nand: nand@68000000 {
-                       compatible = "socionext,denali-nand-v5b";
+                       compatible = "socionext,uniphier-denali-nand-v5b";
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
@@ -320,9 +430,8 @@
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;
                        clocks = <&sys_clk 2>;
-                       nand-ecc-strength = <8>;
                };
        };
 };
 
-/include/ "uniphier-pinctrl.dtsi"
+#include "uniphier-pinctrl.dtsi"