Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

[oweals/u-boot.git] / arch / arm / dts / uniphier-pxs3-ref.dts

diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts b/arch/arm/dts/uniphier-pxs3-ref.dts
index 27f0cb08b93a40fc697b32b5bc6a2c6f7a5da7e6..1965e4dfe4a4778de7b914605d8c78f96560f0d0 100644 (file)
--- a/arch/arm/dts/uniphier-pxs3-ref.dts
+++ b/arch/arm/dts/uniphier-pxs3-ref.dts
@@ -1,21 +1,22 @@
-/*
- * Device Tree Source for UniPhier PXs3 Reference Board
- *
- * Copyright (C) 2017 Socionext Inc.
- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+        X11
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier PXs3 Reference Board
+//
+// Copyright (C) 2017 Socionext Inc.
+//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 
 /dts-v1/;
-/include/ "uniphier-pxs3.dtsi"
-/include/ "uniphier-ref-daughter.dtsi"
-/include/ "uniphier-support-card.dtsi"
+#include "uniphier-pxs3.dtsi"
+#include "uniphier-support-card.dtsi"
 
 / {
        model = "UniPhier PXs3 Reference Board";
        compatible = "socionext,uniphier-pxs3-ref", "socionext,uniphier-pxs3";
 
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
        aliases {
                serial0 = &serial0;
                serial1 = &serial1;
@@ -28,24 +29,90 @@
                i2c6 = &i2c6;
        };
 
-       memory {
+       memory@80000000 {
                device_type = "memory";
                reg = <0 0x80000000 0 0xa0000000>;
        };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
 };
 
 &ethsc {
-       interrupts = <0 48 4>;
+       interrupts = <4 8>;
 };
 
 &serial0 {
        status = "okay";
 };
 
+&serial2 {
+       status = "okay";
+};
+
+&serial3 {
+       status = "okay";
+};
+
+&gpio {
+       xirq4 {
+               gpio-hog;
+               gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
+               input;
+       };
+};
+
 &i2c0 {
        status = "okay";
 };
+
+&i2c1 {
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&sd {
+       status = "okay";
+};
+
+&eth0 {
+       status = "okay";
+       phy-handle = <&ethphy0>;
+};
+
+&mdio0 {
+       ethphy0: ethphy@0 {
+               reg = <0>;
+       };
+};
+
+&eth1 {
+       status = "okay";
+       phy-handle = <&ethphy1>;
+};
+
+&mdio1 {
+       ethphy1: ethphy@0 {
+               reg = <0>;
+       };
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};
+
+&pcie {
+       status = "okay";
+};
+
+&nand {
+       status = "okay";
+};