spi: cadence_qspi: add device tree binding doc

[oweals/u-boot.git] / arch / arm / dts / uniphier-ph1-ld4-ref.dts

diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts
index 08bbd032c99056950fab8e6d3e7df4f2a1a2f06e..25e487ae51184886a1c4dd035511bb5c77ca55e9 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts
@@ -1,18 +1,20 @@
 /*
  * Device Tree Source for UniPhier PH1-LD4 Reference Board
  *
- * Copyright (C) 2014 Panasonic Corporation
- *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ * Copyright (C) 2014-2015 Panasonic Corporation
+ * Copyright (C) 2015      Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+
+ * SPDX-License-Identifier:    GPL-2.0+        X11
  */
 
 /dts-v1/;
 /include/ "uniphier-ph1-ld4.dtsi"
+/include/ "uniphier-ref-daughter.dtsi"
 
 / {
-       model = "Panasonic UniPhier PH1-LD4 Reference Board";
-       compatible = "panasonic,ph1-ld4-ref", "panasonic,ph1-ld4";
+       model = "UniPhier PH1-LD4 Reference Board";
+       compatible = "socionext,ph1-ld4-ref", "socionext,ph1-ld4";
 
        memory {
                device_type = "memory";
@@ -25,10 +27,10 @@
        };
 
        aliases {
-               uart0 = &uart0;
-               uart1 = &uart1;
-               uart2 = &uart2;
-               uart3 = &uart3;
+               serial0 = &uart0;
+               serial1 = &uart1;
+               serial2 = &uart2;
+               serial3 = &uart3;
                i2c0 = &i2c0;
                i2c1 = &i2c1;
                i2c2 = &i2c2;
@@ -46,10 +48,6 @@
 
 &i2c0 {
        status = "okay";
-       eeprom {
-               compatible = "i2c-eeprom";
-               reg = <0x50>;
-       };
 };
 
 &usb0 {