arm64: zynqmp: Add support for zcu102 1.0 rev

[oweals/u-boot.git] / arch / arm / dts / uniphier-ld11.dtsi

diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index 38dc1ecfaba5734732ad448266319dd9e82c496b..cf079b9cd4cf61d018e671636c4d8e876847161d 100644 (file)
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -4,10 +4,10 @@
  * Copyright (C) 2016 Socionext Inc.
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+        X11
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
-/memreserve/ 0x80000000 0x00080000;
+/memreserve/ 0x80000000 0x02000000;
 
 / {
        compatible = "socionext,uniphier-ld11";
@@ -53,31 +53,31 @@
                compatible = "operating-points-v2";
                opp-shared;
 
-               opp@245000000 {
+               opp-245000000 {
                        opp-hz = /bits/ 64 <245000000>;
                        clock-latency-ns = <300>;
                };
-               opp@250000000 {
+               opp-250000000 {
                        opp-hz = /bits/ 64 <250000000>;
                        clock-latency-ns = <300>;
                };
-               opp@490000000 {
+               opp-490000000 {
                        opp-hz = /bits/ 64 <490000000>;
                        clock-latency-ns = <300>;
                };
-               opp@500000000 {
+               opp-500000000 {
                        opp-hz = /bits/ 64 <500000000>;
                        clock-latency-ns = <300>;
                };
-               opp@653334000 {
+               opp-653334000 {
                        opp-hz = /bits/ 64 <653334000>;
                        clock-latency-ns = <300>;
                };
-               opp@666667000 {
+               opp-666667000 {
                        opp-hz = /bits/ 64 <666667000>;
                        clock-latency-ns = <300>;
                };
-               opp@980000000 {
+               opp-980000000 {
                        opp-hz = /bits/ 64 <980000000>;
                        clock-latency-ns = <300>;
                };
@@ -104,12 +104,11 @@
                             <1 10 4>;
        };
 
-       soc {
+       soc@0 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
-               u-boot,dm-pre-reloc;
 
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
@@ -155,6 +154,42 @@
                        clock-frequency = <58820000>;
                };
 
+               gpio: gpio@55000000 {
+                       compatible = "socionext,uniphier-gpio";
+                       reg = <0x55000000 0x200>;
+                       interrupt-parent = <&aidet>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       gpio-ranges = <&pinctrl 0 0 0>,
+                                     <&pinctrl 43 0 0>,
+                                     <&pinctrl 51 0 0>,
+                                     <&pinctrl 96 0 0>,
+                                     <&pinctrl 160 0 0>,
+                                     <&pinctrl 184 0 0>;
+                       gpio-ranges-group-names = "gpio_range0",
+                                                 "gpio_range1",
+                                                 "gpio_range2",
+                                                 "gpio_range3",
+                                                 "gpio_range4",
+                                                 "gpio_range5";
+                       ngpios = <200>;
+                       socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
+                                                    <21 217 3>;
+               };
+
+               adamv@57920000 {
+                       compatible = "socionext,uniphier-ld11-adamv",
+                                    "simple-mfd", "syscon";
+                       reg = <0x57920000 0x1000>;
+
+                       adamv_rst: reset {
+                               compatible = "socionext,uniphier-ld11-adamv-reset";
+                               #reset-cells = <1>;
+                       };
+               };
+
                i2c0: i2c@58780000 {
                        compatible = "socionext,uniphier-fi2c";
                        status = "disabled";
@@ -237,7 +272,7 @@
                        pinctrl-0 = <&pinctrl_system_bus>;
                };
 
-               smpctrl@59800000 {
+               smpctrl@59801000 {
                        compatible = "socionext,uniphier-smpctrl";
                        reg = <0x59801000 0x400>;
                };
@@ -279,6 +314,11 @@
                        bus-width = <8>;
                        mmc-ddr-1_8v;
                        mmc-hs200-1_8v;
+                       cdns,phy-input-delay-legacy = <4>;
+                       cdns,phy-input-delay-mmc-highspeed = <2>;
+                       cdns,phy-input-delay-mmc-ddr = <3>;
+                       cdns,phy-dll-delay-sdclk = <21>;
+                       cdns,phy-dll-delay-sdclk-hsmmc = <21>;
                };
 
                usb0: usb@5a800100 {
@@ -318,7 +358,7 @@
                };
 
                mioctrl@5b3e0000 {
-                       compatible = "socionext,uniphier-mioctrl",
+                       compatible = "socionext,uniphier-ld11-mioctrl",
                                     "simple-mfd", "syscon";
                        reg = <0x5b3e0000 0x800>;
 
@@ -338,17 +378,17 @@
                        compatible = "socionext,uniphier-ld11-soc-glue",
                                     "simple-mfd", "syscon";
                        reg = <0x5f800000 0x2000>;
-                       u-boot,dm-pre-reloc;
 
                        pinctrl: pinctrl {
                                compatible = "socionext,uniphier-ld11-pinctrl";
-                               u-boot,dm-pre-reloc;
                        };
                };
 
-               aidet@5fc20000 {
-                       compatible = "simple-mfd", "syscon";
+               aidet: aidet@5fc20000 {
+                       compatible = "socionext,uniphier-ld11-aidet";
                        reg = <0x5fc20000 0x200>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
                };
 
                gic: interrupt-controller@5fe00000 {
@@ -374,10 +414,14 @@
                                compatible = "socionext,uniphier-ld11-reset";
                                #reset-cells = <1>;
                        };
+
+                       watchdog {
+                               compatible = "socionext,uniphier-wdt";
+                       };
                };
 
                nand: nand@68000000 {
-                       compatible = "socionext,denali-nand-v5b";
+                       compatible = "socionext,uniphier-denali-nand-v5b";
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
@@ -385,9 +429,8 @@
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;
                        clocks = <&sys_clk 2>;
-                       nand-ecc-strength = <8>;
                };
        };
 };
 
-/include/ "uniphier-pinctrl.dtsi"
+#include "uniphier-pinctrl.dtsi"