Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
[oweals/u-boot.git] / arch / arm / dts / uniphier-ld11.dtsi
index 577803bd62db679cec7b2738360810166a9e2633..337a3537ed28735de67b42bb23fd75733ce94a03 100644 (file)
@@ -8,8 +8,6 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/gpio/uniphier-gpio.h>
 
-/memreserve/ 0x80000000 0x02000000;
-
 / {
        compatible = "socionext,uniphier-ld11";
        #address-cells = <2>;
@@ -33,7 +31,7 @@
 
                cpu0: cpu@0 {
                        device_type = "cpu";
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        reg = <0 0x000>;
                        clocks = <&sys_clk 33>;
                        enable-method = "psci";
@@ -42,7 +40,7 @@
 
                cpu1: cpu@1 {
                        device_type = "cpu";
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        reg = <0 0x001>;
                        clocks = <&sys_clk 33>;
                        enable-method = "psci";
                             <1 10 4>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               secure-memory@81000000 {
+                       reg = <0x0 0x81000000 0x0 0x01000000>;
+                       no-map;
+               };
+       };
+
        soc@0 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_uart0>;
                        clocks = <&peri_clk 0>;
-                       clock-frequency = <58820000>;
                        resets = <&peri_rst 0>;
                };
 
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_uart1>;
                        clocks = <&peri_clk 1>;
-                       clock-frequency = <58820000>;
                        resets = <&peri_rst 1>;
                };
 
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_uart2>;
                        clocks = <&peri_clk 2>;
-                       clock-frequency = <58820000>;
                        resets = <&peri_rst 2>;
                };
 
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_uart3>;
                        clocks = <&peri_clk 3>;
-                       clock-frequency = <58820000>;
                        resets = <&peri_rst 3>;
                };
 
                        reg = <0x5a000000 0x400>;
                        interrupts = <0 78 4>;
                        pinctrl-names = "default";
-                       pinctrl-0 = <&pinctrl_emmc_1v8>;
+                       pinctrl-0 = <&pinctrl_emmc>;
                        clocks = <&sys_clk 4>;
                        resets = <&sys_rst 4>;
                        bus-width = <8>;
                        mmc-ddr-1_8v;
                        mmc-hs200-1_8v;
                        mmc-pwrseq = <&emmc_pwrseq>;
-                       cdns,phy-input-delay-legacy = <4>;
+                       cdns,phy-input-delay-legacy = <9>;
                        cdns,phy-input-delay-mmc-highspeed = <2>;
                        cdns,phy-input-delay-mmc-ddr = <3>;
                        cdns,phy-dll-delay-sdclk = <21>;
                                 <&mio_clk 12>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
                                 <&mio_rst 12>;
+                       phy-names = "usb";
+                       phys = <&usb_phy0>;
                        has-transaction-translator;
                };
 
                                 <&mio_clk 13>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
                                 <&mio_rst 13>;
+                       phy-names = "usb";
+                       phys = <&usb_phy1>;
                        has-transaction-translator;
                };
 
                                 <&mio_clk 14>;
                        resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
                                 <&mio_rst 14>;
+                       phy-names = "usb";
+                       phys = <&usb_phy2>;
                        has-transaction-translator;
                };
 
                        pinctrl: pinctrl {
                                compatible = "socionext,uniphier-ld11-pinctrl";
                        };
+
+                       usb-phy {
+                               compatible = "socionext,uniphier-ld11-usb2-phy";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               usb_phy0: phy@0 {
+                                       reg = <0>;
+                                       #phy-cells = <0>;
+                               };
+
+                               usb_phy1: phy@1 {
+                                       reg = <1>;
+                                       #phy-cells = <0>;
+                               };
+
+                               usb_phy2: phy@2 {
+                                       reg = <2>;
+                                       #phy-cells = <0>;
+                               };
+                       };
                };
 
                soc-glue@5f900000 {
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;
-                       clocks = <&sys_clk 2>;
+                       clock-names = "nand", "nand_x", "ecc";
+                       clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
                        resets = <&sys_rst 2>;
                };
        };