arm64: add better and more generic spin-table support

[oweals/u-boot.git] / arch / arm / dts / uniphier-common32.dtsi

diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi
index 43e5bea60d9421f06665e386e06971449274db08..b0b2b57bb969aa8e88e970b4661daf26e5c532c6 100644 (file)
--- a/arch/arm/dts/uniphier-common32.dtsi
+++ b/arch/arm/dts/uniphier-common32.dtsi
@@ -22,12 +22,7 @@
                #size-cells = <1>;
                ranges;
                interrupt-parent = <&intc>;
-
-               extbus: extbus {
-                       compatible = "simple-bus";
-                       #address-cells = <2>;
-                       #size-cells = <1>;
-               };
+               u-boot,dm-pre-reloc;
 
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
@@ -69,9 +64,25 @@
                        clocks = <&uart_clk>;
                };
 
-               system-bus-controller@58c00000 {
-                       compatible = "socionext,uniphier-system-bus-controller";
-                       reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
+               system_bus: system-bus@58c00000 {
+                       compatible = "socionext,uniphier-system-bus";
+                       status = "disabled";
+                       reg = <0x58c00000 0x400>;
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_system_bus>;
+               };
+
+               smpctrl@59800000 {
+                       compatible = "socionext,uniphier-smpctrl";
+                       reg = <0x59801000 0x400>;
+               };
+
+               mio: mioctrl@59810000 {
+                       /* specify compatible in each SoC DTSI */
+                       reg = <0x59810000 0x800>;
+                       #clock-cells = <1>;
                };
 
                peri: perictrl@59820000 {
@@ -102,9 +113,15 @@
                        interrupt-controller;
                };
 
-               pinctrl: pinctrl@5f801000 {
-                       /* specify compatible in each SoC DTSI */
-                       reg = <0x5f801000 0xe00>;
+               soc-glue@5f800000 {
+                       compatible = "simple-mfd", "syscon";
+                       reg = <0x5f800000 0x2000>;
+                       u-boot,dm-pre-reloc;
+
+                       pinctrl: pinctrl {
+                               /* specify compatible in each SoC DTSI */
+                               u-boot,dm-pre-reloc;
+                       };
                };
 
                sysctrl: sysctrl@61840000 {
@@ -117,8 +134,12 @@
 
                nand: nand@68000000 {
                        compatible = "denali,denali-nand-dt";
-                       reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       status = "disabled";
                        reg-names = "nand_data", "denali_reg";
+                       reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       interrupts = <0 65 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_nand>;
                };
        };
 };