Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

[oweals/u-boot.git] / arch / arm / dts / tegra30.dtsi

diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
index aa7e7ae55ca65cc10c8c31677fc10d35cde57abc..ccf154f1e76c0d8f2404aa0b53660788ac043d6f 100644 (file)
--- a/arch/arm/dts/tegra30.dtsi
+++ b/arch/arm/dts/tegra30.dtsi
@@ -1,10 +1,10 @@
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
 
 / {
        compatible = "nvidia,tegra30";
 
-       tegra_car: clock@60006000 {
-               compatible = "nvidia,tegra30-car", "nvidia,tegra20-car";
+       tegra_car: clock {
+               compatible = "nvidia,tegra30-car";
                reg = <0x60006000 0x1000>;
                #clock-cells = <1>;
        };
@@ -44,50 +44,176 @@
                              0 141 0x04
                              0 142 0x04
                              0 143 0x04>;
+               clocks = <&tegra_car 34>;
+       };
+
+       gpio: gpio {
+               compatible = "nvidia,tegra30-gpio";
+               reg = <0x6000d000 0x1000>;
+               interrupts = <0 32 0x04
+                             0 33 0x04
+                             0 34 0x04
+                             0 35 0x04
+                             0 55 0x04
+                             0 87 0x04
+                             0 89 0x04
+                             0 125 0x04>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               #interrupt-cells = <2>;
+               interrupt-controller;
        };
 
        i2c@7000c000 {
+               compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000c000 0x100>;
+               interrupts = <0 38 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-               reg = <0x7000C000 0x100>;
-               /* PERIPH_ID_I2C1, CLK_M */
-               clocks = <&tegra_car 12>;
+               clocks = <&tegra_car 12>, <&tegra_car 182>;
+               clock-names = "div-clk", "fast-clk";
+               status = "disabled";
        };
 
        i2c@7000c400 {
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000c400 0x100>;
+               interrupts = <0 84 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-               reg = <0x7000C400 0x100>;
-               /* PERIPH_ID_I2C2, CLK_M */
-               clocks = <&tegra_car 54>;
+               clocks = <&tegra_car 54>, <&tegra_car 182>;
+               clock-names = "div-clk", "fast-clk";
+               status = "disabled";
        };
 
        i2c@7000c500 {
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000c500 0x100>;
+               interrupts = <0 92 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-               reg = <0x7000C500 0x100>;
-               /* PERIPH_ID_I2C3, CLK_M */
-               clocks = <&tegra_car 67>;
+               clocks = <&tegra_car 67>, <&tegra_car 182>;
+               clock-names = "div-clk", "fast-clk";
+               status = "disabled";
        };
 
        i2c@7000c700 {
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000c700 0x100>;
+               interrupts = <0 120 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-               reg = <0x7000C700 0x100>;
-               /* PERIPH_ID_I2C4, CLK_M */
-               clocks = <&tegra_car 103>;
+               clocks = <&tegra_car 103>, <&tegra_car 182>;
+               clock-names = "div-clk", "fast-clk";
+               status = "disabled";
        };
 
        i2c@7000d000 {
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000d000 0x100>;
+               interrupts = <0 53 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-               reg = <0x7000D000 0x100>;
-               /* PERIPH_ID_I2C_DVC, CLK_M */
-               clocks = <&tegra_car 47>;
+               clocks = <&tegra_car 47>, <&tegra_car 182>;
+               clock-names = "div-clk", "fast-clk";
+               status = "disabled";
+       };
+
+       spi@7000d400 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000d400 0x200>;
+               interrupts = <0 59 0x04>;
+               nvidia,dma-request-selector = <&apbdma 15>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 41>;
+               status = "disabled";
+       };
+
+       spi@7000d600 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000d600 0x200>;
+               interrupts = <0 82 0x04>;
+               nvidia,dma-request-selector = <&apbdma 16>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 44>;
+               status = "disabled";
+       };
+
+       spi@7000d800 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000d480 0x200>;
+               interrupts = <0 83 0x04>;
+               nvidia,dma-request-selector = <&apbdma 17>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 46>;
+               status = "disabled";
+       };
+
+       spi@7000da00 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000da00 0x200>;
+               interrupts = <0 93 0x04>;
+               nvidia,dma-request-selector = <&apbdma 18>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 68>;
+               status = "disabled";
+       };
+
+       spi@7000dc00 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000dc00 0x200>;
+               interrupts = <0 94 0x04>;
+               nvidia,dma-request-selector = <&apbdma 27>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 104>;
+               status = "disabled";
+       };
+
+       spi@7000de00 {
+               compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+               reg = <0x7000de00 0x200>;
+               interrupts = <0 79 0x04>;
+               nvidia,dma-request-selector = <&apbdma 28>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&tegra_car 105>;
+               status = "disabled";
+       };
+
+       sdhci@78000000 {
+               compatible = "nvidia,tegra30-sdhci";
+               reg = <0x78000000 0x200>;
+               interrupts = <0 14 0x04>;
+               clocks = <&tegra_car 14>;
+               status = "disabled";
+       };
+
+       sdhci@78000200 {
+               compatible = "nvidia,tegra30-sdhci";
+               reg = <0x78000200 0x200>;
+               interrupts = <0 15 0x04>;
+               clocks = <&tegra_car 9>;
+               status = "disabled";
+       };
+
+       sdhci@78000400 {
+               compatible = "nvidia,tegra30-sdhci";
+               reg = <0x78000400 0x200>;
+               interrupts = <0 19 0x04>;
+               clocks = <&tegra_car 69>;
+               status = "disabled";
+       };
+
+       sdhci@78000600 {
+               compatible = "nvidia,tegra30-sdhci";
+               reg = <0x78000600 0x200>;
+               interrupts = <0 31 0x04>;
+               clocks = <&tegra_car 15>;
+               status = "disabled";
        };
 };