ARM: tegra: pull Tegra30 SoC DT from Linux v4.7

[oweals/u-boot.git] / arch / arm / dts / tegra30-colibri.dts

diff --git a/arch/arm/dts/tegra30-colibri.dts b/arch/arm/dts/tegra30-colibri.dts
index 37b6abd52f05480018af45c46458b56aa4fd664f..3cff2f62e62e897d553b28477d26a11371e9a240 100644 (file)
--- a/arch/arm/dts/tegra30-colibri.dts
+++ b/arch/arm/dts/tegra30-colibri.dts
@@ -14,8 +14,8 @@
                i2c0 = "/i2c@7000d000";
                i2c1 = "/i2c@7000c000";
                i2c2 = "/i2c@7000c700";
-               sdhci0 = "/sdhci@78000600";
-               sdhci1 = "/sdhci@78000200";
+               mmc0 = "/sdhci@78000600";
+               mmc1 = "/sdhci@78000200";
                spi0 = "/spi@7000d400";
                usb0 = "/usb@7d000000";
                usb1 = "/usb@7d004000"; /* on module only, for ASIX */
@@ -64,7 +64,7 @@
        sdhci@78000200 {
                status = "okay";
                bus-width = <4>;
-               cd-gpios = <&gpio 23 1>; /* PC7, MMCD */
+               cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
        };
 
        sdhci@78000600 {
@@ -76,19 +76,33 @@
        /* EHCI instance 0: USB1_DP/N -> USBC_P/N */
        usb@7d000000 {
                status = "okay";
-               dr_mode = "peripheral";
+               dr_mode = "otg";
        };
 
        /* EHCI instance 1: USB2_DP/N -> AX88772B */
        usb@7d004000 {
                status = "okay";
-               phy_type = "utmi";
-               nvidia,vbus-gpio = <&gpio 234 0>;       /* PDD2, VBUS_LAN */
+               /* VBUS_LAN */
+               nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
        };
 
        /* EHCI instance 2: USB3_DP/N -> USBH_P/N */
        usb@7d008000 {
                status = "okay";
-               nvidia,vbus-gpio = <&gpio 178 1>;       /* PW2, USBH_PEN */
+               /* USBH_PEN */
+               nvidia,vbus-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
+       };
+
+       clocks {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               clk32k_in: clk@0 {
+                       compatible = "fixed-clock";
+                       reg=<0>;
+                       #clock-cells = <0>;
+                       clock-frequency = <32768>;
+               };
        };
 };