i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
i2c4 = "/i2c@7000c700";
- sdhci0 = "/sdhci@78000600";
- sdhci1 = "/sdhci@78000000";
+ mmc0 = "/sdhci@78000600";
+ mmc1 = "/sdhci@78000000";
spi0 = "/spi@7000da00";
usb0 = "/usb@7d008000";
};
reg = <0x80000000 0x40000000>;
};
- pcie-controller@00003000 {
+ pcie@3000 {
status = "okay";
/* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
sdhci@78000000 {
status = "okay";
- cd-gpios = <&gpio 69 1>; /* gpio PI5 */
- wp-gpios = <&gpio 155 0>; /* gpio PT3 */
- power-gpios = <&gpio 31 0>; /* gpio PD7 */
+ cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
sdhci@78000600 {
status = "okay";
bus-width = <8>;
+ non-removable;
};
usb@7d008000 {
- nvidia,vbus-gpio = <&gpio 236 0>; /* PDD4 */
+ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
status = "okay";
};
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clk32k_in: clock@0 {
+ compatible = "fixed-clock";
+ reg=<0>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;
};
};
};
+
+&uarta {
+ status = "okay";
+};