ARM: dts: rmobile: Add soc label to Gen3
[oweals/u-boot.git] / arch / arm / dts / tegra186.dtsi
index c296c2f202f74dbeebbfc0d127912895ff2d6997..dd9e3b869de716c43bcb8f559207adfbf2cb6ddb 100644 (file)
                #interrupt-cells = <2>;
        };
 
+       ethernet@2490000 {
+               compatible = "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10";
+               reg = <0x0 0x02490000 0x0 0x10000>;
+               interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&bpmp TEGRA186_CLK_AXI_CBB>,
+                       <&bpmp TEGRA186_CLK_EQOS_AXI>,
+                       <&bpmp TEGRA186_CLK_EQOS_RX>,
+                       <&bpmp TEGRA186_CLK_EQOS_PTP_REF>,
+                       <&bpmp TEGRA186_CLK_EQOS_TX>;
+               clock-names = "slave_bus",
+                       "master_bus",
+                       "rx",
+                       "ptp_ref",
+                       "tx";
+               resets = <&bpmp TEGRA186_RESET_EQOS>;
+               reset-names = "eqos";
+               phy-mode = "rgmii";
+               status = "disabled";
+       };
+
        uarta: serial@3100000 {
                compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
                reg = <0x0 0x03100000 0x0 0x10000>;
                status = "disabled";
        };
 
+       gen1_i2c: i2c@3160000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x3160000 0x0 0x100>;
+               interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C1>;
+               clock-names = "div-clk";
+               resets = <&bpmp TEGRA186_RESET_I2C1>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       cam_i2c: i2c@3180000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x3180000 0x0 0x100>;
+               interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C3>;
+               clock-names = "div-clk";
+               resets = <&bpmp TEGRA186_RESET_I2C3>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       dp_aux_ch1_i2c: i2c@3190000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x3190000 0x0 0x100>;
+               interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C4>;
+               clock-names = "div-clk";
+               resets = <&bpmp TEGRA186_RESET_I2C4>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       dp_aux_ch0_i2c: i2c@31b0000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x31b0000 0x0 0x100>;
+               interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C6>;
+               clock-names = "div-clk";
+               resets = <&bpmp TEGRA186_RESET_I2C6>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       gen7_i2c: i2c@31c0000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x31c0000 0x0 0x100>;
+               interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C7>;
+               clock-names = "div-clk";
+               resets = <&bpmp TEGRA186_RESET_I2C7>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       gen9_i2c: i2c@31e0000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0x31e0000 0x0 0x100>;
+               interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C9>;
+               clock-names = "div-clk";
+               resets = <&bpmp TEGRA186_RESET_I2C9>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
        sdhci@3400000 {
                compatible = "nvidia,tegra186-sdhci";
                reg = <0x0 0x03400000 0x0 0x200>;
                resets = <&bpmp TEGRA186_RESET_SDMMC1>;
-               reset-names = "sdmmc";
+               reset-names = "sdhci";
                clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
-               clock-names = "sdmmc";
                interrupts = <GIC_SPI 62 0x04>;
                status = "disabled";
        };
                compatible = "nvidia,tegra186-sdhci";
                reg = <0x0 0x03460000 0x0 0x200>;
                resets = <&bpmp TEGRA186_RESET_SDMMC4>;
-               reset-names = "sdmmc";
+               reset-names = "sdhci";
                clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
-               clock-names = "sdmmc";
                interrupts = <GIC_SPI 31 0x04>;
                status = "disabled";
        };
                #mbox-cells = <2>;
        };
 
+       gen2_i2c: i2c@c240000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0xc240000 0x0 0x100>;
+               interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C2>;
+               clock-names = "div-clk";
+               resets = <&bpmp TEGRA186_RESET_I2C2>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
+       gen8_i2c: i2c@c250000 {
+               compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c";
+               reg = <0x0 0xc250000 0x0 0x100>;
+               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clocks = <&bpmp TEGRA186_CLK_I2C8>;
+               clock-names = "div-clk";
+               resets = <&bpmp TEGRA186_RESET_I2C8>;
+               reset-names = "i2c";
+               status = "disabled";
+       };
+
        gpio_aon: gpio@c2f0000 {
                compatible = "nvidia,tegra186-gpio-aon";
                reg-names = "security", "gpio";
 
                bpmp_i2c: i2c {
                        compatible = "nvidia,tegra186-bpmp-i2c";
-                       nvidia,bpmp = <&bpmp>;
                        nvidia,bpmp-bus-id = <5>;
                        #address-cells = <1>;
                        #size-cells = <0>;