ARM: dts: rmobile: Add soc label to Gen3
[oweals/u-boot.git] / arch / arm / dts / sun8i-a83t-cubietruck-plus.dts
index 88b1e0970b8d89c94ba6822bc34f03eeb3c0477c..5dba4fc310f8dca35232eed33b1399e1023ad8a9 100644 (file)
 /dts-v1/;
 #include "sun8i-a83t.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
+
 / {
        model = "Cubietech Cubietruck Plus";
        compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
 
        aliases {
+               ethernet0 = &emac;
                serial0 = &uart0;
        };
 
        chosen {
                stdout-path = "serial0:115200n8";
        };
+
+       leds {
+               compatible = "gpio-leds";
+
+               blue {
+                       label = "cubietruck-plus:blue:usr";
+                       gpios = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */
+               };
+
+               orange {
+                       label = "cubietruck-plus:orange:usr";
+                       gpios = <&pio 3 26 GPIO_ACTIVE_HIGH>; /* PD26 */
+               };
+
+               white {
+                       label = "cubietruck-plus:white:usr";
+                       gpios = <&pio 3 27 GPIO_ACTIVE_HIGH>; /* PD27 */
+               };
+
+               green {
+                       label = "cubietruck-plus:green:usr";
+                       gpios = <&pio 4 4 GPIO_ACTIVE_HIGH>; /* PE4 */
+               };
+       };
+
+       usb-hub {
+               /* I2C is not connected */
+               compatible = "smsc,usb3503";
+               initial-mode = <1>; /* initialize in HUB mode */
+               disabled-ports = <1>;
+               intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
+               reset-gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */
+               connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
+               refclk-frequency = <19200000>;
+       };
+
+       reg_usb1_vbus: reg-usb1-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usb1-vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+               enable-active-high;
+               gpio = <&pio 3 29 GPIO_ACTIVE_HIGH>; /* PD29 */
+       };
+
+       reg_usb2_vbus: reg-usb2-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usb2-vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+               enable-active-high;
+               gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+       };
+
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,name = "On-board SPDIF";
+
+               simple-audio-card,cpu {
+                       sound-dai = <&spdif>;
+               };
+
+               simple-audio-card,codec {
+                       sound-dai = <&spdif_out>;
+               };
+       };
+
+       spdif_out: spdif-out {
+               #sound-dai-cells = <0>;
+               compatible = "linux,spdif-dit";
+       };
+
+       wifi_pwrseq: wifi_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               clocks = <&ac100_rtc 1>;
+               clock-names = "ext_clock";
+               /* The WiFi low power clock must be 32768 Hz */
+               assigned-clocks = <&ac100_rtc 1>;
+               assigned-clock-rates = <32768>;
+               /* enables internal regulator and de-asserts reset */
+               reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
+       };
+};
+
+&ehci0 {
+       /* GL830 USB-to-SATA bridge here */
+       status = "okay";
+};
+
+&ehci1 {
+       /* USB3503 HSIC USB 2.0 hub here */
+       status = "okay";
+};
+
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_dldo4>;
+       phy-handle = <&rgmii_phy>;
+       phy-mode = "rgmii";
+       status = "okay";
+};
+
+&mdio {
+       rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};
+
+&mmc0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins>;
+       vmmc-supply = <&reg_dcdc1>;
+       bus-width = <4>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       status = "okay";
+};
+
+&mmc1 {
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_sw>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       bus-width = <4>;
+       non-removable;
+       status = "okay";
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_8bit_emmc_pins>;
+       vmmc-supply = <&reg_dcdc1>;
+       bus-width = <8>;
+       non-removable;
+       cap-mmc-hw-reset;
+       status = "okay";
+};
+
+&r_rsb {
+       status = "okay";
+
+       axp81x: pmic@3a3 {
+               compatible = "x-powers,axp818", "x-powers,axp813";
+               reg = <0x3a3>;
+               interrupt-parent = <&r_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               eldoin-supply = <&reg_dcdc1>;
+               swin-supply = <&reg_dcdc1>;
+               x-powers,drive-vbus-en;
+       };
+
+       ac100: codec@e89 {
+               compatible = "x-powers,ac100";
+               reg = <0xe89>;
+
+               ac100_codec: codec {
+                       compatible = "x-powers,ac100-codec";
+                       interrupt-parent = <&r_pio>;
+                       interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
+                       #clock-cells = <0>;
+                       clock-output-names = "4M_adda";
+               };
+
+               ac100_rtc: rtc {
+                       compatible = "x-powers,ac100-rtc";
+                       interrupt-parent = <&r_intc>;
+                       interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+                       clocks = <&ac100_codec>;
+                       #clock-cells = <1>;
+                       clock-output-names = "cko1_rtc",
+                                            "cko2_rtc",
+                                            "cko3_rtc";
+               };
+       };
+};
+
+#include "axp81x.dtsi"
+
+&reg_aldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcc-1v8";
+};
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "dram-pll";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "avcc";
+};
+
+&reg_dcdc1 {
+       /*
+        * The schematics say this should be 3.3V, but the FEX file says
+        * it should be 3V. The latter makes sense, as the WiFi module's
+        * I/O is indirectly powered from DCDC1, through SW. It is rated
+        * at 2.98V maximum.
+        */
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-3v";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <700000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-cpua";
+};
+
+&reg_dcdc3 {
+       regulator-always-on;
+       regulator-min-microvolt = <700000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-cpub";
+};
+
+&reg_dcdc4 {
+       regulator-min-microvolt = <700000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-gpu";
+};
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1500000>;
+       regulator-max-microvolt = <1500000>;
+       regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+       regulator-always-on;
+       regulator-min-microvolt = <900000>;
+       regulator-max-microvolt = <900000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_dldo2 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "dp-pwr";
+};
+
+&reg_dldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <2500000>;
+       regulator-max-microvolt = <2500000>;
+       regulator-name = "ephy-io";
+};
+
+&reg_dldo4 {
+       /*
+        * The PHY requires 20ms after all voltages are applied until core
+        * logic is ready and 30ms after the reset pin is de-asserted.
+        * Set a 100ms delay to account for PMIC ramp time and board traces.
+        */
+       regulator-enable-ramp-delay = <100000>;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "ephy";
+};
+
+&reg_drivevbus {
+       regulator-name = "usb0-vbus";
+       status = "okay";
+};
+
+&reg_eldo1 {
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "dp-bridge-1";
+};
+
+&reg_eldo2 {
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "dp-bridge-2";
+};
+
+&reg_fldo1 {
+       /* TODO should be handled by USB PHY */
+       regulator-always-on;
+       regulator-min-microvolt = <1080000>;
+       regulator-max-microvolt = <1320000>;
+       regulator-name = "vdd12-hsic";
+};
+
+&reg_fldo2 {
+       /*
+        * Despite the embedded CPUs core not being used in any way,
+        * this must remain on or the system will hang.
+        */
+       regulator-always-on;
+       regulator-min-microvolt = <700000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+       regulator-name = "vcc-rtc";
+};
+
+&reg_sw {
+       regulator-name = "vcc-wifi-io";
+};
+
+&spdif {
+       status = "okay";
 };
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_b>;
+       pinctrl-0 = <&uart0_pb_pins>;
+       status = "okay";
+};
+
+&usb_otg {
+       status = "okay";
+};
+
+&usbphy {
+       usb1_vbus-supply = <&reg_usb1_vbus>;
+       usb2_vbus-supply = <&reg_usb2_vbus>;
        status = "okay";
 };