ARM: dts: stm32: DT alignment with kernel v5.4-rc4
[oweals/u-boot.git] / arch / arm / dts / stm32mp157c.dtsi
index a6045dd682c6900dce9757593690d7e1c59f5aed..6c670cf9a362adfbc4c0e3b408b66155c326b27f 100644 (file)
                };
        };
 
+       booster: regulator-booster {
+               compatible = "st,stm32mp1-booster";
+               st,syscfg = <&syscfg>;
+               status = "disabled";
+       };
+
        reboot {
                compatible = "syscon-reboot";
                regmap = <&rcc>;
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
                        timer@15 {
 
                        pwm {
                                compatible = "st,stm32-pwm";
+                               #pwm-cells = <3>;
                                status = "disabled";
                        };
 
                        clocks = <&rcc ADC12>, <&rcc ADC12_K>;
                        clock-names = "bus", "adc";
                        interrupt-controller;
+                       st,syscfg = <&syscfg>;
                        #interrupt-cells = <1>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                              <0x89010000 0x1000>,
                              <0x89020000 0x1000>;
                        interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+                       dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
+                              <&mdma1 20 0x10 0x12000a08 0x0 0x0>,
+                              <&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
+                       dma-names = "tx", "rx", "ecc";
                        clocks = <&rcc FMC_K>;
                        resets = <&rcc FMC_R>;
                        status = "disabled";
                        reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
                        reg-names = "qspi", "qspi_mm";
                        interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+                       dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
+                              <&mdma1 22 0x10 0x100008 0x0 0x0>;
+                       dma-names = "tx", "rx";
                        clocks = <&rcc QSPI_K>;
                        resets = <&rcc QSPI_R>;
                        status = "disabled";