rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD

[oweals/u-boot.git] / arch / arm / dts / stm32mp157c-ed1-u-boot.dtsi

diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index 200601edff66e4836ffeded9d79f6267bd63a140..84af7fa47b78a54744a69850279bf11232fa8939 100644 (file)
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -4,7 +4,7 @@
  */
 
 #include <dt-bindings/clock/stm32mp1-clksrc.h>
-#include "stm32mp157-u-boot.dtsi"
+#include "stm32mp15-u-boot.dtsi"
 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
 
 / {
@@ -15,31 +15,18 @@
        };
 
        config {
+               u-boot,boot-led = "heartbeat";
+               u-boot,error-led = "error";
                st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
                st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
        };
 
        led {
-               compatible = "gpio-leds";
-
                red {
-                       label = "stm32mp:red:status";
+                       label = "error";
                        gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
                        default-state = "off";
-               };
-               green {
-                       label = "stm32mp:green:user";
-                       gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
-                       default-state = "on";
-               };
-               orange {
-                       label = "stm32mp:orange:status";
-                       gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>;
-                       default-state = "off";
-               };
-               blue {
-                       label = "stm32mp:blue:user";
-                       gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
+                       status = "okay";
                };
        };
 };
@@ -116,7 +103,7 @@
                CLK_UART6_HSI
                CLK_UART78_HSI
                CLK_SPDIF_PLL4P
-               CLK_FDCAN_PLL4Q
+               CLK_FDCAN_PLL4R
                CLK_SAI1_PLL3Q
                CLK_SAI2_PLL3Q
                CLK_SAI3_PLL3Q
@@ -130,6 +117,8 @@
 
        /* VCO = 1300.0 MHz => P = 650 (CPU) */
        pll1: st,pll@0 {
+               compatible = "st,stm32mp1-pll";
+               reg = <0>;
                cfg = < 2 80 0 0 0 PQR(1,0,0) >;
                frac = < 0x800 >;
                u-boot,dm-pre-reloc;
@@ -137,6 +126,8 @@
 
        /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
        pll2: st,pll@1 {
+               compatible = "st,stm32mp1-pll";
+               reg = <1>;
                cfg = < 2 65 1 0 0 PQR(1,1,1) >;
                frac = < 0x1400 >;
                u-boot,dm-pre-reloc;
@@ -144,6 +135,8 @@
 
        /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
        pll3: st,pll@2 {
+               compatible = "st,stm32mp1-pll";
+               reg = <2>;
                cfg = < 1 33 1 16 36 PQR(1,1,1) >;
                frac = < 0x1a04 >;
                u-boot,dm-pre-reloc;
@@ -151,6 +144,8 @@
 
        /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
        pll4: st,pll@3 {
+               compatible = "st,stm32mp1-pll";
+               reg = <3>;
                cfg = < 3 98 5 7 7 PQR(1,1,1) >;
                u-boot,dm-pre-reloc;
        };
@@ -162,7 +157,10 @@
 
 &sdmmc1_b4_pins_a {
        u-boot,dm-spl;
-       pins {
+       pins1 {
+               u-boot,dm-spl;
+       };
+       pins2 {
                u-boot,dm-spl;
        };
 };
@@ -183,7 +181,10 @@
 
 &sdmmc2_b4_pins_a {
        u-boot,dm-spl;
-       pins {
+       pins1 {
+               u-boot,dm-spl;
+       };
+       pins2 {
                u-boot,dm-spl;
        };
 };
@@ -206,5 +207,7 @@
        };
        pins2 {
                u-boot,dm-pre-reloc;
+               /* pull-up on rx to avoid floating level */
+               bias-pull-up;
        };
 };