/ {
aliases {
+ i2c3 = &i2c4;
mmc0 = &sdmmc1;
mmc1 = &sdmmc2;
- i2c3 = &i2c4;
};
- led {
- compatible = "gpio-leds";
+ config {
+ u-boot,boot-led = "heartbeat";
+ u-boot,error-led = "error";
+ st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
+ st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
+ };
+ led {
red {
- label = "stm32mp:red:status";
+ label = "error";
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
default-state = "off";
+ status = "okay";
};
- green {
- label = "stm32mp:green:user";
- gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
- orange {
- label = "stm32mp:orange:status";
- gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
+
blue {
- label = "stm32mp:blue:user";
- gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
};
};
};
-&uart4_pins_a {
+&clk_hse {
+ st,digbypass;
+};
+
+&i2c4 {
u-boot,dm-pre-reloc;
- pins1 {
- u-boot,dm-pre-reloc;
- };
- pins2 {
- u-boot,dm-pre-reloc;
- };
};
&i2c4_pins_a {
};
};
-&uart4 {
- u-boot,dm-pre-reloc;
-};
-
-&i2c4 {
- u-boot,dm-pre-reloc;
-};
-
&pmic {
u-boot,dm-pre-reloc;
};
-/* CLOCK init */
&rcc {
st,clksrc = <
CLK_MPU_PLL1P
CLK_FMC_ACLK
CLK_QSPI_ACLK
CLK_ETH_DISABLED
- CLK_SDMMC12_PLL3R
+ CLK_SDMMC12_PLL4P
CLK_DSI_DSIPLL
CLK_STGEN_HSE
CLK_USBPHY_HSE
CLK_SPI45_HSI
CLK_SPI6_HSI
CLK_I2C46_HSI
- CLK_SDMMC3_PLL3R
+ CLK_SDMMC3_PLL4P
CLK_USBO_USBPHY
CLK_ADC_CKPER
CLK_CEC_LSE
CLK_UART35_HSI
CLK_UART6_HSI
CLK_UART78_HSI
- CLK_SPDIF_PLL3Q
+ CLK_SPDIF_PLL4P
CLK_FDCAN_PLL4Q
CLK_SAI1_PLL3Q
CLK_SAI2_PLL3Q
CLK_SAI3_PLL3Q
CLK_SAI4_PLL3Q
- CLK_RNG1_CSI
- CLK_RNG2_CSI
+ CLK_RNG1_LSI
+ CLK_RNG2_LSI
CLK_LPTIM1_PCLK1
CLK_LPTIM23_PCLK3
- CLK_LPTIM45_PCLK3
+ CLK_LPTIM45_LSE
>;
/* VCO = 1300.0 MHz => P = 650 (CPU) */
u-boot,dm-pre-reloc;
};
- /* VCO = 786.4 MHz => P = 197, Q = 49, R = 98 */
+ /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
pll3: st,pll@2 {
- cfg = < 2 97 3 15 7 PQR(1,1,1) >;
- frac = < 0x9ba >;
+ cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+ frac = < 0x1a04 >;
u-boot,dm-pre-reloc;
};
- /* VCO = 508.0 MHz => P = 56, Q = 56, R = 56 */
+ /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
pll4: st,pll@3 {
- cfg = < 5 126 8 8 8 PQR(1,1,1) >;
+ cfg = < 3 98 5 7 7 PQR(1,1,1) >;
u-boot,dm-pre-reloc;
};
};
-/* SPL part **************************************/
-/* MMC1 boot */
+&sdmmc1 {
+ u-boot,dm-spl;
+};
+
&sdmmc1_b4_pins_a {
u-boot,dm-spl;
pins {
&sdmmc1_dir_pins_a {
u-boot,dm-spl;
- pins {
+ pins1 {
+ u-boot,dm-spl;
+ };
+ pins2 {
u-boot,dm-spl;
};
};
-&sdmmc1 {
+&sdmmc2 {
u-boot,dm-spl;
};
-/* MMC2 boot */
&sdmmc2_b4_pins_a {
u-boot,dm-spl;
pins {
};
};
-&sdmmc2 {
- u-boot,dm-spl;
+&uart4 {
+ u-boot,dm-pre-reloc;
+};
+
+&uart4_pins_a {
+ u-boot,dm-pre-reloc;
+ pins1 {
+ u-boot,dm-pre-reloc;
+ };
+ pins2 {
+ u-boot,dm-pre-reloc;
+ /* pull-up on rx to avoid floating level */
+ bias-pull-up;
+ };
};