ARM: dts: sama5d2: Add uart4 definition

[oweals/u-boot.git] / arch / arm / dts / stm32mp157a-dk1-u-boot.dtsi

diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index 4045a6e7312d706e5ac4039476830f25191cbc0c..5844d41c536f51e55b2b5dacd64f3e9b6da481f8 100644 (file)
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -4,7 +4,7 @@
  */
 
 #include <dt-bindings/clock/stm32mp1-clksrc.h>
-#include "stm32mp157-u-boot.dtsi"
+#include "stm32mp15-u-boot.dtsi"
 #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
 
 / {
@@ -110,7 +110,7 @@
                CLK_UART6_HSI
                CLK_UART78_HSI
                CLK_SPDIF_PLL4P
-               CLK_FDCAN_PLL4Q
+               CLK_FDCAN_PLL4R
                CLK_SAI1_PLL3Q
                CLK_SAI2_PLL3Q
                CLK_SAI3_PLL3Q
@@ -124,6 +124,8 @@
 
        /* VCO = 1300.0 MHz => P = 650 (CPU) */
        pll1: st,pll@0 {
+               compatible = "st,stm32mp1-pll";
+               reg = <0>;
                cfg = < 2 80 0 0 0 PQR(1,0,0) >;
                frac = < 0x800 >;
                u-boot,dm-pre-reloc;
@@ -131,6 +133,8 @@
 
        /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
        pll2: st,pll@1 {
+               compatible = "st,stm32mp1-pll";
+               reg = <1>;
                cfg = < 2 65 1 0 0 PQR(1,1,1) >;
                frac = < 0x1400 >;
                u-boot,dm-pre-reloc;
@@ -138,6 +142,8 @@
 
        /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
        pll3: st,pll@2 {
+               compatible = "st,stm32mp1-pll";
+               reg = <2>;
                cfg = < 1 33 1 16 36 PQR(1,1,1) >;
                frac = < 0x1a04 >;
                u-boot,dm-pre-reloc;
@@ -145,6 +151,8 @@
 
        /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
        pll4: st,pll@3 {
+               compatible = "st,stm32mp1-pll";
+               reg = <3>;
                cfg = < 3 98 5 7 7 PQR(1,1,1) >;
                u-boot,dm-pre-reloc;
        };
@@ -156,7 +164,10 @@
 
 &sdmmc1_b4_pins_a {
        u-boot,dm-spl;
-       pins {
+       pins1 {
+               u-boot,dm-spl;
+       };
+       pins2 {
                u-boot,dm-spl;
        };
 };