Merge branch 'master' of git://git.denx.de/u-boot

[oweals/u-boot.git] / arch / arm / dts / stm32mp157a-dk1-u-boot.dtsi

diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index af7acfa0375d0a13800bed69022abf78591de334..5844d41c536f51e55b2b5dacd64f3e9b6da481f8 100644 (file)
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -4,18 +4,21 @@
  */
 
 #include <dt-bindings/clock/stm32mp1-clksrc.h>
-#include "stm32mp157-u-boot.dtsi"
+#include "stm32mp15-u-boot.dtsi"
 #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
 
 / {
        aliases {
                i2c3 = &i2c4;
                mmc0 = &sdmmc1;
+               usb0 = &usbotg_hs;
        };
        config {
                u-boot,boot-led = "heartbeat";
                u-boot,error-led = "error";
                st,adc_usb_pd = <&adc1 18>, <&adc1 19>;
+               st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
+               st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
        };
        led {
                red {
@@ -32,24 +35,7 @@
 };
 
 &adc {
-       pinctrl-names = "default";
-       pinctrl-0 = <&adc12_usb_pwr_pins_a>;
-       vdd-supply = <&vdd>;
-       vdda-supply = <&vdd>;
-       vref-supply = <&vrefbuf>;
        status = "okay";
-       adc1: adc@0 {
-               /*
-                * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in18 & in19.
-                * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
-                * 5 * (56 + 47kOhms) * 5pF => 2.5us.
-                * Use arbitrary margin here (e.g. 5µs).
-                */
-               st,min-sample-time-nsecs = <5000>;
-               /* ANA0, ANA1, USB Type-C CC1 & CC2 */
-               st,adc-channels = <0 1 18 19>;
-               status = "okay";
-       };
 };
 
 &clk_hse {
@@ -124,7 +110,7 @@
                CLK_UART6_HSI
                CLK_UART78_HSI
                CLK_SPDIF_PLL4P
-               CLK_FDCAN_PLL4Q
+               CLK_FDCAN_PLL4R
                CLK_SAI1_PLL3Q
                CLK_SAI2_PLL3Q
                CLK_SAI3_PLL3Q
@@ -138,6 +124,8 @@
 
        /* VCO = 1300.0 MHz => P = 650 (CPU) */
        pll1: st,pll@0 {
+               compatible = "st,stm32mp1-pll";
+               reg = <0>;
                cfg = < 2 80 0 0 0 PQR(1,0,0) >;
                frac = < 0x800 >;
                u-boot,dm-pre-reloc;
@@ -145,6 +133,8 @@
 
        /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
        pll2: st,pll@1 {
+               compatible = "st,stm32mp1-pll";
+               reg = <1>;
                cfg = < 2 65 1 0 0 PQR(1,1,1) >;
                frac = < 0x1400 >;
                u-boot,dm-pre-reloc;
@@ -152,6 +142,8 @@
 
        /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
        pll3: st,pll@2 {
+               compatible = "st,stm32mp1-pll";
+               reg = <2>;
                cfg = < 1 33 1 16 36 PQR(1,1,1) >;
                frac = < 0x1a04 >;
                u-boot,dm-pre-reloc;
@@ -159,6 +151,8 @@
 
        /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
        pll4: st,pll@3 {
+               compatible = "st,stm32mp1-pll";
+               reg = <3>;
                cfg = < 3 98 5 7 7 PQR(1,1,1) >;
                u-boot,dm-pre-reloc;
        };
@@ -170,7 +164,10 @@
 
 &sdmmc1_b4_pins_a {
        u-boot,dm-spl;
-       pins {
+       pins1 {
+               u-boot,dm-spl;
+       };
+       pins2 {
                u-boot,dm-spl;
        };
 };
@@ -186,14 +183,12 @@
        };
        pins2 {
                u-boot,dm-pre-reloc;
+               /* pull-up on rx to avoid floating level */
+               bias-pull-up;
        };
 };
 
 &usbotg_hs {
-       usb1600;
+       u-boot,force-b-session-valid;
        hnp-srp-disable;
 };
-
-&v3v3 {
-       regulator-always-on;
-};