arm: dts: lx2160a: add noted for dpmacs 1, 2, 5-6
[oweals/u-boot.git] / arch / arm / dts / stm32mp151.dtsi
index f185639a460f5a8c297764c0fd579cbc14c1b578..75d2c0d296efc509b77fce17730a284da19ca093 100644 (file)
@@ -17,6 +17,7 @@
 
                cpu0: cpu@0 {
                        compatible = "arm,cortex-a7";
+                       clock-frequency = <650000000>;
                        device_type = "cpu";
                        reg = <0>;
                };
                        resets = <&rcc I2C1_R>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       wakeup-source;
                        status = "disabled";
                };
 
                        resets = <&rcc I2C2_R>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       wakeup-source;
                        status = "disabled";
                };
 
                        resets = <&rcc I2C3_R>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       wakeup-source;
                        status = "disabled";
                };
 
                        resets = <&rcc I2C5_R>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       wakeup-source;
                        status = "disabled";
                };
 
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&rcc DMA1>;
+                       resets = <&rcc DMA1_R>;
                        #dma-cells = <4>;
                        st,mem2mem;
                        dma-requests = <8>;
                                     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&rcc DMA2>;
+                       resets = <&rcc DMA2_R>;
                        #dma-cells = <4>;
                        st,mem2mem;
                        dma-requests = <8>;
                        dma-masters = <&dma1 &dma2>;
                        dma-channels = <16>;
                        clocks = <&rcc DMAMUX>;
+                       resets = <&rcc DMAMUX_R>;
                };
 
                adc: adc@48003000 {
                };
 
                usbotg_hs: usb-otg@49000000 {
-                       compatible = "snps,dwc2";
+                       compatible = "st,stm32mp15-hsotg", "snps,dwc2";
                        reg = <0x49000000 0x10000>;
                        clocks = <&rcc USBO_K>;
                        clock-names = "otg";
                        reg = <0x58000000 0x1000>;
                        interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&rcc MDMA>;
+                       resets = <&rcc MDMA_R>;
                        #dma-cells = <5>;
                        dma-channels = <32>;
                        dma-requests = <48>;
                        resets = <&rcc I2C4_R>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       wakeup-source;
                        status = "disabled";
                };
 
                        resets = <&rcc I2C6_R>;
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       wakeup-source;
                        status = "disabled";
                };