Merge branch 'master' of git://git.denx.de/u-boot

[oweals/u-boot.git] / arch / arm / dts / stm32mp15-ddr.dtsi

diff --git a/arch/arm/dts/stm32mp15-ddr.dtsi b/arch/arm/dts/stm32mp15-ddr.dtsi
index ddfa0794d9f8bb85a96e9fe2e34a2507b8f6113c..8b20b5e17357f33cd6396e6922661db06e3c88af 100644 (file)
--- a/arch/arm/dts/stm32mp15-ddr.dtsi
+++ b/arch/arm/dts/stm32mp15-ddr.dtsi
@@ -1,12 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
 /*
  * Copyright : STMicroelectronics 2018
- *
- * SPDX-License-Identifier:    GPL-2.0+        BSD-3-Clause
  */
 
 / {
        soc {
-               ddr: ddr@0x5A003000{
+               ddr: ddr@5a003000 {
                        u-boot,dm-pre-reloc;
 
                        compatible = "st,stm32mp1-ddr";
@@ -14,12 +13,12 @@
                        reg = <0x5A003000 0x550
                               0x5A004000 0x234>;
 
-                       clocks = <&rcc_clk AXIDCG>,
-                                <&rcc_clk DDRC1>,
-                                <&rcc_clk DDRC2>,
-                                <&rcc_clk DDRPHYC>,
-                                <&rcc_clk DDRCAPB>,
-                                <&rcc_clk DDRPHYCAPB>;
+                       clocks = <&rcc AXIDCG>,
+                                <&rcc DDRC1>,
+                                <&rcc DDRC2>,
+                                <&rcc DDRPHYC>,
+                                <&rcc DDRCAPB>,
+                                <&rcc DDRPHYCAPB>;
 
                        clock-names = "axidcg",
                                      "ddrc1",
@@ -134,6 +133,7 @@
                                DDR_MR3
                        >;
 
+#ifdef DDR_PHY_CAL_SKIP
                        st,phy-cal = <
                                DDR_DX0DLLCR
                                DDR_DX0DQTR
@@ -149,6 +149,8 @@
                                DDR_DX3DQSTR
                        >;
 
+#endif
+
                        status = "okay";
                };
        };