Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

[oweals/u-boot.git] / arch / arm / dts / stm32h743i-eval.dts

diff --git a/arch/arm/dts/stm32h743i-eval.dts b/arch/arm/dts/stm32h743i-eval.dts
index 28c876be27fc695da51644284f39589131073fd9..3f8e0c4a998d0cec39c592bc8f7688e9327bf12b 100644 (file)
--- a/arch/arm/dts/stm32h743i-eval.dts
+++ b/arch/arm/dts/stm32h743i-eval.dts
@@ -43,7 +43,6 @@
 /dts-v1/;
 #include "stm32h743.dtsi"
 #include "stm32h743-pinctrl.dtsi"
-#include <dt-bindings/memory/stm32-sdram.h>
 
 / {
        model = "STMicroelectronics STM32H743i-EVAL board";
@@ -60,50 +59,62 @@
 
        aliases {
                serial0 = &usart1;
-               gpio0 = &gpioa;
-               gpio1 = &gpiob;
-               gpio2 = &gpioc;
-               gpio3 = &gpiod;
-               gpio4 = &gpioe;
-               gpio5 = &gpiof;
-               gpio6 = &gpiog;
-               gpio7 = &gpioh;
-               gpio8 = &gpioi;
-               gpio9 = &gpioj;
-               gpio10 = &gpiok;
        };
+
+       vdda: regulator-vdda {
+               compatible = "regulator-fixed";
+               regulator-name = "vdda";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       usbotg_hs_phy: usb-phy {
+               #phy-cells = <0>;
+               compatible = "usb-nop-xceiv";
+               clocks = <&rcc USB1ULPI_CK>;
+               clock-names = "main_clk";
+       };
+
 };
 
-&usart1 {
-       pinctrl-0 = <&usart1_pins>;
-       pinctrl-names = "default";
+&adc_12 {
+       vref-supply = <&vdda>;
        status = "okay";
+       adc1: adc@0 {
+               /* potentiometer */
+               st,adc-channels = <0>;
+               status = "okay";
+       };
+};
+
+&clk_hse {
+       clock-frequency = <25000000>;
 };
 
-&fmc {
-       pinctrl-0 = <&fmc_pins>;
+&i2c1 {
+       pinctrl-0 = <&i2c1_pins_a>;
        pinctrl-names = "default";
+       i2c-scl-rising-time-ns = <185>;
+       i2c-scl-falling-time-ns = <20>;
        status = "okay";
+};
 
-       /*
-        * Memory configuration from sdram datasheet IS42S32800G-6BLI
-        * firsct bank is bank@0
-        * second bank is bank@1
-        */
-       bank2: bank@1 {
-               st,sdram-control = /bits/ 8 <NO_COL_9 NO_ROW_12 MWIDTH_32 BANKS_4
-                                 CAS_2 SDCLK_3 RD_BURST_EN RD_PIPE_DL_0>;
-               st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_1 TRAS_1 TRC_6 TRP_2
-                                 TWR_1 TRCD_1>;
-               st,sdram-refcount = <1539>;
-       };
+&rtc {
+       status = "okay";
 };
 
-&sdmmc1 {
+&usart1 {
+       pinctrl-0 = <&usart1_pins>;
+       pinctrl-names = "default";
        status = "okay";
-       pinctrl-0 = <&sdmmc1_pins>,
-                   <&pinctrl_sdmmc1_level_shifter>;
+};
+
+&usbotg_hs {
+       pinctrl-0 = <&usbotg_hs_pins_a>;
        pinctrl-names = "default";
-       bus-width = <4>;
-       st,dirpol;
+       phys = <&usbotg_hs_phy>;
+       phy-names = "usb2-phy";
+       dr_mode = "otg";
+       status = "okay";
 };