Merge git://git.denx.de/u-boot-dm
[oweals/u-boot.git] / arch / arm / dts / stm32h743i-disco.dts
index 79e841d94079c6d66cc5504cfbedf301a60c5222..917a859a09f0fc7341c7d0fe4867f044b550c33a 100644 (file)
@@ -43,6 +43,7 @@
 /dts-v1/;
 #include "stm32h743.dtsi"
 #include "stm32h743-pinctrl.dtsi"
+#include <dt-bindings/memory/stm32-sdram.h>
 
 / {
        model = "STMicroelectronics STM32H743i-Discovery board";
 
        aliases {
                serial0 = &usart2;
+               mmc0 = &sdmmc1;
+               gpio0 = &gpioa;
+               gpio1 = &gpiob;
+               gpio2 = &gpioc;
+               gpio3 = &gpiod;
+               gpio4 = &gpioe;
+               gpio5 = &gpiof;
+               gpio6 = &gpiog;
+               gpio7 = &gpioh;
+               gpio8 = &gpioi;
+               gpio9 = &gpioj;
+               gpio10 = &gpiok;
        };
 };
 
-&clk_hse {
-       clock-frequency = <125000000>;
-};
-
 &usart2 {
        pinctrl-0 = <&usart2_pins>;
        pinctrl-names = "default";
        status = "okay";
 };
+
+&fmc {
+       pinctrl-0 = <&fmc_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       /*
+        * Memory configuration from sdram datasheet IS42S32800G-6BLI
+        * firsct bank is bank@0
+        * second bank is bank@1
+        */
+       bank1: bank@1 {
+               st,sdram-control = /bits/ 8 <NO_COL_9 NO_ROW_12 MWIDTH_32 BANKS_4
+                                 CAS_2 SDCLK_3 RD_BURST_EN RD_PIPE_DL_0>;
+               st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_1 TRAS_1 TRC_6 TRP_2
+                                 TWR_1 TRCD_1>;
+               st,sdram-refcount = <1539>;
+       };
+};
+
+&sdmmc1 {
+       status = "okay";
+       pinctrl-0 = <&sdmmc1_pins>;
+       pinctrl-names = "default";
+       bus-width = <4>;
+       cd-gpios = <&gpioi 8 1>;
+};