Merge tag 'mips-pull-2019-11-16' of git://git.denx.de/u-boot-mips

[oweals/u-boot.git] / arch / arm / dts / stm32h743.dtsi

diff --git a/arch/arm/dts/stm32h743.dtsi b/arch/arm/dts/stm32h743.dtsi
index 36a99db0a3b4cd08a1e8388ad5c8d832efeb8781..d5b8d879ee2ac112705504ac8032b411995aa9d4 100644 (file)
--- a/arch/arm/dts/stm32h743.dtsi
+++ b/arch/arm/dts/stm32h743.dtsi
@@ -42,45 +42,96 @@
 
 #include "skeleton.dtsi"
 #include "armv7-m.dtsi"
+#include <dt-bindings/clock/stm32h7-clks.h>
+#include <dt-bindings/mfd/stm32h7-rcc.h>
 
 / {
        clocks {
                clk_hse: clk-hse {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
-                       clock-frequency = <0>;
+                       clock-frequency = <25000000>;
+               };
+
+               clk_lse: clk-lse {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <32768>;
                };
 
-               timer_clk: timer-clk {
+               clk_i2s: i2s_ckin {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
-                       clock-frequency = <125000000>;
+                       clock-frequency = <0>;
                };
        };
 
        soc {
+               rcc: rcc@58024400 {
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       compatible = "st,stm32h743-rcc", "st,stm32-rcc";
+                       reg = <0x58024400 0x400>;
+                       clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>, <&clk_hsi>, <&clk_csi>;
+                       st,syscfg = <&pwrcfg>;
+               };
+
                usart1: serial@40011000 {
-                       compatible = "st,stm32f7-usart", "st,stm32f7-uart";
+                       compatible = "st,stm32h7-uart";
                        reg = <0x40011000 0x400>;
                        interrupts = <37>;
                        status = "disabled";
-                       clocks = <&timer_clk>;
-
+                       clocks = <&rcc USART1_CK>;
                };
 
                usart2: serial@40004400 {
-                       compatible = "st,stm32f7-usart", "st,stm32f7-uart";
+                       compatible = "st,stm32h7-uart";
                        reg = <0x40004400 0x400>;
                        interrupts = <38>;
                        status = "disabled";
-                       clocks = <&timer_clk>;
+                       clocks = <&rcc USART2_CK>;
                };
 
                timer5: timer@40000c00 {
                        compatible = "st,stm32-timer";
                        reg = <0x40000c00 0x400>;
                        interrupts = <50>;
-                       clocks = <&timer_clk>;
+                       clocks = <&rcc TIM5_CK>;
+               };
+
+               pwrcfg: power-config@58024800 {
+                       compatible = "syscon";
+                       reg = <0x58024800 0x400>;
+               };
+
+               fmc: fmc@52004000 {
+                       compatible = "st,stm32h7-fmc";
+                       reg = <0x52004000 0x1000>;
+                       clocks = <&rcc FMC_CK>;
+               };
+
+               clk_hsi: clk-hsi {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <64000000>;
+               };
+
+               clk_csi: clk-csi {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <4000000>;
+               };
+
+               sdmmc1: sdmmc@52007000 {
+                       compatible = "st,stm32-sdmmc2";
+                       reg = <0x52007000 0x1000>;
+                       interrupts = <49>;
+                       clocks = <&rcc SDMMC1_CK>;
+                       resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
+                       st,idma = <1>;
+                       cap-sd-highspeed;
+                       cap-mmc-highspeed;
+                       status = "disabled";
                };
        };
 };