ARM: dts: imx6dl-icore-rqs: Fix to include correct dtsi

[oweals/u-boot.git] / arch / arm / dts / stm32h743.dtsi

diff --git a/arch/arm/dts/stm32h743.dtsi b/arch/arm/dts/stm32h743.dtsi
index 16e93089d72666a1075b503366fd4327a53c1bee..d5b8d879ee2ac112705504ac8032b411995aa9d4 100644 (file)
--- a/arch/arm/dts/stm32h743.dtsi
+++ b/arch/arm/dts/stm32h743.dtsi
@@ -43,6 +43,7 @@
 #include "skeleton.dtsi"
 #include "armv7-m.dtsi"
 #include <dt-bindings/clock/stm32h7-clks.h>
+#include <dt-bindings/mfd/stm32h7-rcc.h>
 
 / {
        clocks {
@@ -76,7 +77,7 @@
                };
 
                usart1: serial@40011000 {
-                       compatible = "st,stm32h7-usart", "st,stm32h7-uart";
+                       compatible = "st,stm32h7-uart";
                        reg = <0x40011000 0x400>;
                        interrupts = <37>;
                        status = "disabled";
@@ -84,7 +85,7 @@
                };
 
                usart2: serial@40004400 {
-                       compatible = "st,stm32h7-usart", "st,stm32h7-uart";
+                       compatible = "st,stm32h7-uart";
                        reg = <0x40004400 0x400>;
                        interrupts = <38>;
                        status = "disabled";
@@ -120,6 +121,18 @@
                        compatible = "fixed-clock";
                        clock-frequency = <4000000>;
                };
+
+               sdmmc1: sdmmc@52007000 {
+                       compatible = "st,stm32-sdmmc2";
+                       reg = <0x52007000 0x1000>;
+                       interrupts = <49>;
+                       clocks = <&rcc SDMMC1_CK>;
+                       resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
+                       st,idma = <1>;
+                       cap-sd-highspeed;
+                       cap-mmc-highspeed;
+                       status = "disabled";
+               };
        };
 };