ARM: DTS: Re-sync logicpd-som-lv with Linux 4.16-rc3
[oweals/u-boot.git] / arch / arm / dts / stm32f746.dtsi
index 783d4e734e5873f428d6f3a992d2fde24d68a388..46d148eab2c83b0916b453039ab62264b56a0cb5 100644 (file)
@@ -65,6 +65,9 @@
                        compatible = "st,stm32-dwmac";
                        reg = <0x40028000 0x8000>;
                        reg-names = "stmmaceth";
+                       clocks = <&rcc 0 STM32F7_AHB1_CLOCK(ETHMAC)>,
+                                <&rcc 0 STM32F7_AHB1_CLOCK(ETHMACTX)>,
+                                <&rcc 0 STM32F7_AHB1_CLOCK(ETHMACRX)>;
                        interrupts = <61>, <62>;
                        interrupt-names = "macirq", "eth_wake_irq";
                        snps,pbl = <8>;
                        status = "disabled";
                        u-boot,dm-pre-reloc;
                };
+
+               pwrcfg: power-config@58024800 {
+                       compatible = "syscon";
+                       reg = <0x40007000 0x400>;
+               };
+
                rcc: rcc@40023810 {
                        #reset-cells = <1>;
                        #clock-cells = <2>;
-                       compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
+                       compatible = "st,stm32f746-rcc", "st,stm32-rcc";
                        reg = <0x40023800 0x400>;
                        clocks = <&clk_hse>;
+                       st,syscfg = <&pwrcfg>;
                        u-boot,dm-pre-reloc;
                };
 
                                u-boot,dm-pre-reloc;
                        };
 
+                       sdio_pins: sdio_pins@0 {
+                               pins {
+                                       pinmux = <STM32F746_PC8_FUNC_SDMMC1_D0>,
+                                                <STM32F746_PC9_FUNC_SDMMC1_D1>,
+                                                <STM32F746_PC10_FUNC_SDMMC1_D2>,
+                                                <STM32F746_PC11_FUNC_SDMMC1_D3>,
+                                                <STM32F746_PC12_FUNC_SDMMC1_CK>,
+                                                <STM32F746_PD2_FUNC_SDMMC1_CMD>;
+                                       drive-push-pull;
+                                       slew-rate = <2>;
+                               };
+                       };
+
+                       sdio_pins_od: sdio_pins_od@0 {
+                               pins1 {
+                                       pinmux = <STM32F746_PC8_FUNC_SDMMC1_D0>,
+                                                <STM32F746_PC9_FUNC_SDMMC1_D1>,
+                                                <STM32F746_PC10_FUNC_SDMMC1_D2>,
+                                                <STM32F746_PC11_FUNC_SDMMC1_D3>,
+                                                <STM32F746_PC12_FUNC_SDMMC1_CK>;
+                                       drive-push-pull;
+                                       slew-rate = <2>;
+                               };
+
+                               pins2 {
+                                       pinmux = <STM32F746_PD2_FUNC_SDMMC1_CMD>;
+                                       drive-open-drain;
+                                       slew-rate = <2>;
+                               };
+                       };
+
+                       sdio_pins_b: sdio_pins_b@0 {
+                               pins {
+                                       pinmux = <STM32F769_PG9_FUNC_SDMMC2_D0>,
+                                                <STM32F769_PG10_FUNC_SDMMC2_D1>,
+                                                <STM32F769_PB3_FUNC_SDMMC2_D2>,
+                                                <STM32F769_PB4_FUNC_SDMMC2_D3>,
+                                                <STM32F769_PD6_FUNC_SDMMC2_CLK>,
+                                                <STM32F769_PD7_FUNC_SDMMC2_CMD>;
+                                       drive-push-pull;
+                                       slew-rate = <2>;
+                               };
+                       };
+
+                       sdio_pins_od_b: sdio_pins_od_b@0 {
+                               pins1 {
+                                       pinmux = <STM32F769_PG9_FUNC_SDMMC2_D0>,
+                                                <STM32F769_PG10_FUNC_SDMMC2_D1>,
+                                                <STM32F769_PB3_FUNC_SDMMC2_D2>,
+                                                <STM32F769_PB4_FUNC_SDMMC2_D3>,
+                                                <STM32F769_PD6_FUNC_SDMMC2_CLK>;
+                                       drive-push-pull;
+                                       slew-rate = <2>;
+                               };
+
+                               pins2 {
+                                       pinmux = <STM32F769_PD7_FUNC_SDMMC2_CMD>;
+                                       drive-open-drain;
+                                       slew-rate = <2>;
+                               };
+                       };
+
+               };
+               sdio: sdio@40012c00 {
+                       compatible = "st,stm32f4xx-sdio";
+                       reg = <0x40012c00 0x400>;
+                       clocks = <&rcc 0 171>;
+                       interrupts = <49>;
+                       status = "disabled";
+                       pinctrl-0 = <&sdio_pins>;
+                       pinctrl-1 = <&sdio_pins_od>;
+                       pinctrl-names = "default", "opendrain";
+                       max-frequency = <48000000>;
+               };
+
+               sdio2: sdio2@40011c00 {
+                       compatible = "st,stm32f4xx-sdio";
+                       reg = <0x40011c00 0x400>;
+                       clocks = <&rcc 0 167>;
+                       interrupts = <103>;
+                       status = "disabled";
+                       pinctrl-0 = <&sdio_pins_b>;
+                       pinctrl-1 = <&sdio_pins_od_b>;
+                       pinctrl-names = "default", "opendrain";
+                       max-frequency = <48000000>;
                };
        };
 };