sunxi: ga10h: Enable both otg and regular usb host controllers

[oweals/u-boot.git] / arch / arm / dts / socfpga_cyclone5_socrates.dts

diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index a1814b4574509e10026b2702125cd9b3c9edbb17..ea30483e52fbc3d93b1438ef576cdf36bf1f4d18 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -1,18 +1,7 @@
 /*
  *  Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include "socfpga_cyclone5.dtsi"
@@ -25,6 +14,12 @@
                bootargs = "console=ttyS0,115200";
        };
 
+       aliases {
+               spi0 = "/spi@ff705000";         /* QSPI */
+               spi1 = "/spi@fff00000";
+               spi2 = "/spi@fff01000";
+       };
+
        memory {
                name = "memory";
                device_type = "memory";
@@ -48,3 +43,23 @@
 &mmc {
        status = "okay";
 };
+
+&qspi {
+       status = "okay";
+
+       flash0: n25q00@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "n25q00";
+               reg = <0>;      /* chip select */
+               spi-max-frequency = <50000000>;
+               m25p,fast-read;
+               page-size = <256>;
+               block-size = <16>; /* 2^16, 64KB */
+               read-delay = <4>;  /* delay value in read data capture register */
+               tshsl-ns = <50>;
+               tsd2d-ns = <50>;
+               tchsh-ns = <4>;
+               tslch-ns = <4>;
+       };
+};