ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1046ARDB

[oweals/u-boot.git] / arch / arm / dts / socfpga_cyclone5_socdk.dts

diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
index 3af51134bbec6c5e97951641cf005541cc1ca0ab..95c7619b8d65f5b101aa92d707294d13bb4c5e12 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -1,31 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
- *  Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
+ * Copyright (C) 2012 Altera Corporation <www.altera.com>
  */
 
 #include "socfpga_cyclone5.dtsi"
 
 / {
        model = "Altera SOCFPGA Cyclone V SoC Development Kit";
-       compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+       compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";
 
        chosen {
-               bootargs = "console=ttyS0,115200";
+               bootargs = "earlyprintk";
+               stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@0 {
                name = "memory";
                device_type = "memory";
                reg = <0x0 0x40000000>; /* 1GB */
        };
 
        aliases {
-               /* this allow the ethaddr uboot environment variable contents
+               /* this allow the ethaddr uboot environmnet variable contents
                 * to be added to the gmac1 device tree blob.
                 */
                ethernet0 = &gmac1;
-               udc0 = &usb1;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               hps0 {
+                       label = "hps_led0";
+                       gpios = <&portb 15 1>;
+               };
+
+               hps1 {
+                       label = "hps_led1";
+                       gpios = <&portb 14 1>;
+               };
+
+               hps2 {
+                       label = "hps_led2";
+                       gpios = <&portb 13 1>;
+               };
+
+               hps3 {
+                       label = "hps_led3";
+                       gpios = <&portb 12 1>;
+               };
        };
 
        regulator_3_3v: 3-3-v-regulator {
@@ -34,10 +56,10 @@
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
        };
+};
 
-       soc {
-               u-boot,dm-pre-reloc;
-       };
+&can0 {
+       status = "okay";
 };
 
 &gmac1 {
@@ -49,9 +71,9 @@
        rxd2-skew-ps = <0>;
        rxd3-skew-ps = <0>;
        txen-skew-ps = <0>;
-       txc-skew-ps = <2600>;
+       txc-skew-ps = <1560>;
        rxdv-skew-ps = <0>;
-       rxc-skew-ps = <2000>;
+       rxc-skew-ps = <1200>;
 };
 
 &gpio0 {
@@ -68,6 +90,14 @@
 
 &i2c0 {
        status = "okay";
+       clock-frequency = <100000>;
+
+       /*
+        * adjust the falling times to decrease the i2c frequency to 50Khz
+        * because the LCD module does not work at the standard 100Khz
+        */
+       i2c-sda-falling-time-ns = <5000>;
+       i2c-scl-falling-time-ns = <5000>;
 
        eeprom@51 {
                compatible = "atmel,24c32";
@@ -82,32 +112,52 @@
 };
 
 &mmc0 {
-       status = "okay";
-       u-boot,dm-pre-reloc;
-
        cd-gpios = <&portb 18 0>;
        vmmc-supply = <&regulator_3_3v>;
        vqmmc-supply = <&regulator_3_3v>;
+       status = "okay";
 };
 
 &qspi {
        status = "okay";
-       u-boot,dm-pre-reloc;
 
        flash0: n25q00@0 {
-               u-boot,dm-pre-reloc;
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "n25q00", "spi-flash";
-               reg = <0>;      /* chip select */
+               compatible = "n25q00";
+               reg = <0>;      /* chip select */
                spi-max-frequency = <100000000>;
+
                m25p,fast-read;
-               page-size = <256>;
-               block-size = <16>; /* 2^16, 64KB */
+               cdns,page-size = <256>;
+               cdns,block-size = <16>;
+               cdns,read-delay = <4>;
                cdns,tshsl-ns = <50>;
                cdns,tsd2d-ns = <50>;
                cdns,tchsh-ns = <4>;
                cdns,tslch-ns = <4>;
+
+               partition@qspi-boot {
+                       /* 8MB for raw data. */
+                       label = "Flash 0 Raw Data";
+                       reg = <0x0 0x800000>;
+               };
+
+               partition@qspi-rootfs {
+                       /* 120MB for jffs2 data. */
+                       label = "Flash 0 jffs2 Filesystem";
+                       reg = <0x800000 0x7800000>;
+               };
+       };
+};
+
+&spi0 {
+       status = "okay";
+
+       spidev@0 {
+               compatible = "rohm,dh2228fv";
+               reg = <0>;
+               spi-max-frequency = <1000000>;
        };
 };