ARM: dts: imx6dl-icore-rqs: Fix to include correct dtsi

[oweals/u-boot.git] / arch / arm / dts / socfpga_arria5_socdk.dts

diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts
index 4e529a15c3b3d8edea83cc15ce132486ea9cc9fb..4e4b619f4f9cb071cbce21d11ee88028cb67233f 100644 (file)
--- a/arch/arm/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/dts/socfpga_arria5_socdk.dts
@@ -21,10 +21,11 @@
        };
 
        aliases {
-               /* this allow the ethaddr uboot environmnet variable contents
-               * to be added to the gmac1 device tree blob.
-               */
+               /* this allow the ethaddr uboot environment variable contents
+                * to be added to the gmac1 device tree blob.
+                */
                ethernet0 = &gmac1;
+               udc0 = &usb1;
        };
 
        regulator_3_3v: 3-3-v-regulator {
@@ -33,6 +34,10 @@
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
        };
+
+       soc {
+               u-boot,dm-pre-reloc;
+       };
 };
 
 &gmac1 {
@@ -67,8 +72,31 @@
 &mmc0 {
        vmmc-supply = <&regulator_3_3v>;
        vqmmc-supply = <&regulator_3_3v>;
+       bus-width = <4>;
+       u-boot,dm-pre-reloc;
 };
 
 &usb1 {
        status = "okay";
 };
+
+&qspi {
+       status = "okay";
+       u-boot,dm-pre-reloc;
+
+       flash0: n25q00@0 {
+               u-boot,dm-pre-reloc;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "n25q00", "spi-flash";
+               reg = <0>;      /* chip select */
+               spi-max-frequency = <50000000>;
+               m25p,fast-read;
+               page-size = <256>;
+               block-size = <16>; /* 2^16, 64KB */
+               cdns,tshsl-ns = <50>;
+               cdns,tsd2d-ns = <50>;
+               cdns,tchsh-ns = <4>;
+               cdns,tslch-ns = <4>;
+       };
+};