ARM: dts: rk3288: Remove unused LCDC clock assigned

[oweals/u-boot.git] / arch / arm / dts / socfpga_arria5_socdk.dts

diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts
index f2b5963f5943c48220031e99d4c417437a021d06..1e91a65af6b197ec331231c1eb80a9400d8a11f1 100644 (file)
--- a/arch/arm/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/dts/socfpga_arria5_socdk.dts
@@ -21,10 +21,11 @@
        };
 
        aliases {
-               /* this allow the ethaddr uboot environmnet variable contents
+               /* this allow the ethaddr uboot environment variable contents
                 * to be added to the gmac1 device tree blob.
                 */
                ethernet0 = &gmac1;
+               udc0 = &usb1;
        };
 
        regulator_3_3v: 3-3-v-regulator {
@@ -33,6 +34,10 @@
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
        };
+
+       soc {
+               u-boot,dm-pre-reloc;
+       };
 };
 
 &gmac1 {
@@ -67,6 +72,8 @@
 &mmc0 {
        vmmc-supply = <&regulator_3_3v>;
        vqmmc-supply = <&regulator_3_3v>;
+       bus-width = <4>;
+       u-boot,dm-pre-reloc;
 };
 
 &usb1 {
@@ -75,8 +82,10 @@
 
 &qspi {
        status = "okay";
+       u-boot,dm-pre-reloc;
 
        flash0: n25q00@0 {
+               u-boot,dm-pre-reloc;
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "n25q00";
@@ -85,10 +94,9 @@
                m25p,fast-read;
                page-size = <256>;
                block-size = <16>; /* 2^16, 64KB */
-               read-delay = <4>;  /* delay value in read data capture register */
-               tshsl-ns = <50>;
-               tsd2d-ns = <50>;
-               tchsh-ns = <4>;
-               tslch-ns = <4>;
+               cdns,tshsl-ns = <50>;
+               cdns,tsd2d-ns = <50>;
+               cdns,tchsh-ns = <4>;
+               cdns,tslch-ns = <4>;
        };
 };