Merge https://gitlab.denx.de/u-boot/custodians/u-boot-clk

[oweals/u-boot.git] / arch / arm / dts / rk3368.dtsi

diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 025dc322fa9cbcee8daef9b35088fe32951b5734..b4f4f6139dba2d81c8b104a38726ee0db504ff48 100644 (file)
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -46,6 +46,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/memory/rk3368-dmc.h>
 
 / {
        compatible = "rockchip,rk3368";
@@ -227,6 +228,21 @@
                #clock-cells = <0>;
        };
 
+       dmc: dmc@ff610000 {
+               compatible = "rockchip,rk3368-dmc", "syscon";
+               rockchip,cru = <&cru>;
+               rockchip,grf = <&grf>;
+               rockchip,msch = <&service_msch>;
+               reg = <0 0xff610000 0 0x400
+                      0 0xff620000 0 0x400>;
+       };
+
+       service_msch: syscon@ffac0000 {
+               compatible = "rockchip,rk3368-msch", "syscon";
+               reg = <0x0 0xffac0000 0x0 0x2000>;
+               status = "okay";
+       };
+
        sdmmc: dwmmc@ff0c0000 {
                compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff0c0000 0x0 0x4000>;
@@ -645,6 +661,11 @@
                reg = <0x0 0xff738000 0x0 0x1000>;
        };
 
+       sgrf: syscon@ff740000 {
+               compatible = "rockchip,rk3368-sgrf", "syscon";
+               reg = <0x0 0xff740000 0x0 0x1000>;
+       };
+
        cru: clock-controller@ff760000 {
                compatible = "rockchip,rk3368-cru";
                reg = <0x0 0xff760000 0x0 0x1000>;
@@ -666,7 +687,7 @@
                status = "disabled";
        };
 
-       timer@ff810000 {
+       timer0: timer@ff810000 {
                compatible = "rockchip,rk3368-timer", "rockchip,rk3288-timer";
                reg = <0x0 0xff810000 0x0 0x20>;
                interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;