sunxi: Add A20-SOM204-EVB-eMMC board

[oweals/u-boot.git] / arch / arm / dts / rk3328.dtsi

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index a57176d808e75b2c9f4f913d0c73de46c8cb6b4a..5de1059aa29bfd4256f372f84c9cb193f2a67a4d 100644 (file)
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -25,6 +25,9 @@
                i2c1 = &i2c1;
                i2c2 = &i2c2;
                i2c3 = &i2c3;
+               mmc0 = &emmc;
+               mmc1 = &sdmmc;
+               mmc2 = &sdmmc_ext;
        };
 
        cpus {
@@ -453,6 +456,25 @@
                status = "disabled";
        };
 
+       gmac2io: ethernet@ff540000 {
+               compatible = "rockchip,rk3328-gmac";
+               reg = <0x0 0xff540000 0x0 0x10000>;
+               rockchip,grf = <&grf>;
+               interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "macirq";
+               clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>,
+                        <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>,
+                        <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>,
+                        <&cru PCLK_MAC2IO>;
+               clock-names = "stmmaceth", "mac_clk_rx",
+                             "mac_clk_tx", "clk_mac_ref",
+                             "clk_mac_refout", "aclk_mac",
+                             "pclk_mac";
+               resets = <&cru SRST_GMAC2IO_A>;
+               reset-names = "stmmaceth";
+               status = "disabled";
+       };
+
        usb_host0_ehci: usb@ff5c0000 {
                compatible = "generic-ehci";
                reg = <0x0 0xff5c0000 0x0 0x10000>;
@@ -467,6 +489,16 @@
                status = "disabled";
        };
 
+       usb20_otg: usb@ff580000 {
+               compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
+                            "snps,dwc2";
+               reg = <0x0 0xff580000 0x0 0x40000>;
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+               hnp-srp-disable;
+               dr_mode = "otg";
+               status = "disabled";
+       };
+
        sdmmc_ext: rksdmmc@ff5f0000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff5f0000 0x0 0x4000>;