Merge branch 'master' of git://git.denx.de/u-boot-usb

[oweals/u-boot.git] / arch / arm / dts / rk3328.dtsi

diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 8a98ee3a4fc65a7d3a16d56b4673549c25add68a..060c84e6c0cfc38cd710da04d941c5b2f9d21a73 100644 (file)
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <dt-bindings/clock/rk3328-cru.h>
@@ -25,6 +24,9 @@
                i2c1 = &i2c1;
                i2c2 = &i2c2;
                i2c3 = &i2c3;
+               mmc0 = &emmc;
+               mmc1 = &sdmmc;
+               mmc2 = &sdmmc_ext;
        };
 
        cpus {
@@ -186,8 +188,6 @@
        grf: syscon@ff100000 {
                compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd";
                reg = <0x0 0xff100000 0x0 0x1000>;
-               #address-cells = <1>;
-               #size-cells = <1>;
 
                io_domains: io-domains {
                        compatible = "rockchip,rk3328-io-voltage-domain";
@@ -231,7 +231,6 @@
                interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
                clock-names = "baudclk", "apb_pclk";
-               clock-frequency = <24000000>;
                reg-shift = <2>;
                reg-io-width = <4>;
                dmas = <&dmac 6>, <&dmac 7>;
@@ -415,7 +414,7 @@
        sdmmc: rksdmmc@ff500000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff500000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
                clock-names = "biu", "ciu";
                fifo-depth = <0x100>;
@@ -426,7 +425,7 @@
        sdio: dwmmc@ff510000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff510000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
                         <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -438,7 +437,7 @@
        emmc: rksdmmc@ff520000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff520000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
                clock-names = "biu", "ciu";
                fifo-depth = <0x100>;
@@ -446,10 +445,53 @@
                status = "disabled";
        };
 
+       gmac2io: ethernet@ff540000 {
+               compatible = "rockchip,rk3328-gmac";
+               reg = <0x0 0xff540000 0x0 0x10000>;
+               rockchip,grf = <&grf>;
+               interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "macirq";
+               clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>,
+                        <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>,
+                        <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>,
+                        <&cru PCLK_MAC2IO>;
+               clock-names = "stmmaceth", "mac_clk_rx",
+                             "mac_clk_tx", "clk_mac_ref",
+                             "clk_mac_refout", "aclk_mac",
+                             "pclk_mac";
+               resets = <&cru SRST_GMAC2IO_A>;
+               reset-names = "stmmaceth";
+               status = "disabled";
+       };
+
+       usb_host0_ehci: usb@ff5c0000 {
+               compatible = "generic-ehci";
+               reg = <0x0 0xff5c0000 0x0 0x10000>;
+               interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+       };
+
+       usb_host0_ohci: usb@ff5d0000 {
+               compatible = "generic-ohci";
+               reg = <0x0 0xff5d0000 0x0 0x10000>;
+               interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+       };
+
+       usb20_otg: usb@ff580000 {
+               compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
+                            "snps,dwc2";
+               reg = <0x0 0xff580000 0x0 0x40000>;
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+               hnp-srp-disable;
+               dr_mode = "otg";
+               status = "disabled";
+       };
+
        sdmmc_ext: rksdmmc@ff5f0000 {
                compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xff5f0000 0x0 0x4000>;
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
                clock-names = "biu", "ciu";
                fifo-depth = <0x100>;