arm: mvebu: mcbin: dts: fix PCIe reset polarity

[oweals/u-boot.git] / arch / arm / dts / rk3288.dtsi

diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index 64aa07de36971189183c5c9cf64442109efe13b1..487d22c9b012aeae73a4afc2240f76e6d9e981bf 100644 (file)
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -1,6 +1,4 @@
-/*
- * SPDX-License-Identifier:    GPL-2.0+
- */
+// SPDX-License-Identifier: GPL-2.0+
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -167,7 +165,7 @@
 
        sdmmc: dwmmc@ff0c0000 {
                compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                         <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -179,7 +177,7 @@
 
        sdio0: dwmmc@ff0d0000 {
                compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
                         <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -191,7 +189,7 @@
 
        sdio1: dwmmc@ff0e0000 {
                compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
                         <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -203,7 +201,7 @@
 
        emmc: dwmmc@ff0f0000 {
                compatible = "rockchip,rk3288-dw-mshc";
-               clock-freq-min-max = <400000 150000000>;
+               max-frequency = <150000000>;
                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                         <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
                clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
@@ -604,19 +602,16 @@
                u-boot,dm-pre-reloc;
                #clock-cells = <1>;
                #reset-cells = <1>;
-               assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>,
-                                 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
+               assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
                                  <&cru PLL_NPLL>, <&cru ACLK_CPU>,
                                  <&cru HCLK_CPU>, <&cru PCLK_CPU>,
                                  <&cru ACLK_PERI>, <&cru HCLK_PERI>,
                                  <&cru PCLK_PERI>;
-               assigned-clock-rates = <0>, <0>,
-                                      <594000000>, <400000000>,
+               assigned-clock-rates = <594000000>, <400000000>,
                                       <500000000>, <300000000>,
                                       <150000000>, <75000000>,
                                       <300000000>, <150000000>,
                                       <75000000>;
-               assigned-clock-parents = <&cru PLL_NPLL>, <&cru PLL_GPLL>;
        };
 
        grf: syscon@ff770000 {
@@ -654,6 +649,7 @@
                interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
+               #sound-dai-cells = <1>;
                dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>;
                dma-names = "tx", "rx";
                clock-names = "i2s_hclk", "i2s_clk";
@@ -846,8 +842,6 @@
                #size-cells = <0>;
                status = "disabled";
                ports {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        reg = <1>;
                        mipi_in: port {
                                #address-cells = <1>;