ARM: dts: stm32mp15: use DDR3 files generated by STM32CubeMX

[oweals/u-boot.git] / arch / arm / dts / mt7623.dtsi

diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi
index 1135b1e1ae02657c19583079a4b98363c4846d55..0452889ef800a7387f8513820e38e77715ceaf34 100644 (file)
--- a/arch/arm/dts/mt7623.dtsi
+++ b/arch/arm/dts/mt7623.dtsi
@@ -101,21 +101,18 @@
                compatible = "mediatek,mt7623-topckgen";
                reg = <0x10000000 0x1000>;
                #clock-cells = <1>;
-               u-boot,dm-pre-reloc;
        };
 
        infracfg: syscon@10001000 {
                compatible = "mediatek,mt7623-infracfg", "syscon";
                reg = <0x10001000 0x1000>;
                #clock-cells = <1>;
-               u-boot,dm-pre-reloc;
        };
 
        pericfg: syscon@10003000 {
                compatible = "mediatek,mt7623-pericfg", "syscon";
                reg = <0x10003000 0x1000>;
                #clock-cells = <1>;
-               u-boot,dm-pre-reloc;
        };
 
        pinctrl: pinctrl@10005000 {
@@ -155,7 +152,6 @@
                interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
                clocks = <&system_clk>;
                clock-names = "system-clk";
-               u-boot,dm-pre-reloc;
        };
 
        sysirq: interrupt-controller@10200100 {
@@ -170,7 +166,6 @@
                compatible = "mediatek,mt7623-apmixedsys";
                reg = <0x10209000 0x1000>;
                #clock-cells = <1>;
-               u-boot,dm-pre-reloc;
        };
 
        gic: interrupt-controller@10211000 {
@@ -215,7 +210,6 @@
                         <&pericfg CLK_PERI_UART2>;
                clock-names = "baud", "bus";
                status = "disabled";
-               u-boot,dm-pre-reloc;
        };
 
        uart3: serial@11005000 {
@@ -406,4 +400,21 @@
                mediatek,ethsys = <&ethsys>;
                status = "disabled";
        };
+
+       pwm: pwm@11006000 {
+               compatible = "mediatek,mt7623-pwm";
+               reg = <0x11006000 0x1000>;
+               #clock-cells = <1>;
+               #pwm-cells = <2>;
+               clocks = <&topckgen CLK_TOP_PWM_SEL>,
+                        <&pericfg CLK_PERI_PWM>,
+                        <&pericfg CLK_PERI_PWM1>,
+                        <&pericfg CLK_PERI_PWM2>,
+                        <&pericfg CLK_PERI_PWM3>,
+                        <&pericfg CLK_PERI_PWM4>,
+                        <&pericfg CLK_PERI_PWM5>;
+               clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4",
+                             "pwm5";
+               status = "disabled";
+       };
 };