+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Endless Computers, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
*/
#include "meson-gx.dtsi"
/ {
compatible = "amlogic,meson-gxl";
- reserved-memory {
- /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved_alt: secmon@5000000 {
- reg = <0x0 0x05000000 0x0 0x300000>;
- no-map;
+ soc {
+ usb0: usb@c9000000 {
+ status = "disabled";
+ compatible = "amlogic,meson-gxl-dwc3";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ clocks = <&clkc CLKID_USB>;
+ clock-names = "usb_general";
+ resets = <&reset RESET_USB_OTG>;
+ reset-names = "usb_otg";
+
+ dwc3: dwc3@c9000000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0xc9000000 0x0 0x100000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+ snps,dis_u2_susphy_quirk;
+ phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>;
+ };
};
};
};
+&apb {
+ usb2_phy0: phy@78000 {
+ compatible = "amlogic,meson-gxl-usb2-phy";
+ #phy-cells = <0>;
+ reg = <0x0 0x78000 0x0 0x20>;
+ clocks = <&clkc CLKID_USB>;
+ clock-names = "phy";
+ resets = <&reset RESET_USB_OTG>;
+ reset-names = "phy";
+ status = "okay";
+ };
+
+ usb2_phy1: phy@78020 {
+ compatible = "amlogic,meson-gxl-usb2-phy";
+ #phy-cells = <0>;
+ reg = <0x0 0x78020 0x0 0x20>;
+ clocks = <&clkc CLKID_USB>;
+ clock-names = "phy";
+ resets = <&reset RESET_USB_OTG>;
+ reset-names = "phy";
+ status = "okay";
+ };
+
+ usb3_phy: phy@78080 {
+ compatible = "amlogic,meson-gxl-usb3-phy";
+ #phy-cells = <0>;
+ reg = <0x0 0x78080 0x0 0x20>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc CLKID_USB>, <&clkc_AO CLKID_AO_CEC_32K>;
+ clock-names = "phy", "peripheral";
+ resets = <&reset RESET_USB_OTG>, <&reset RESET_USB_OTG>;
+ reset-names = "phy", "peripheral";
+ status = "okay";
+ };
+};
+
+&efuse {
+ clocks = <&clkc CLKID_EFUSE>;
+};
+
ðmac {
reg = <0x0 0xc9410000 0x0 0x10000
0x0 0xc8834540 0x0 0x4>;
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";
function = "uart_ao";
+ bias-disable;
};
};
groups = "uart_cts_ao_a",
"uart_rts_ao_a";
function = "uart_ao";
+ bias-disable;
};
};
mux {
groups = "uart_tx_ao_b", "uart_rx_ao_b";
function = "uart_ao_b";
+ bias-disable;
};
};
mux {
groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1";
function = "uart_ao_b";
+ bias-disable;
};
};
groups = "uart_cts_ao_b",
"uart_rts_ao_b";
function = "uart_ao_b";
+ bias-disable;
};
};
mux {
groups = "remote_input_ao";
function = "remote_input_ao";
+ bias-disable;
};
};
groups = "i2c_sck_ao",
"i2c_sda_ao";
function = "i2c_ao";
+ bias-disable;
};
};
mux {
groups = "pwm_ao_a_3";
function = "pwm_ao_a";
+ bias-disable;
};
};
mux {
groups = "pwm_ao_a_8";
function = "pwm_ao_a";
+ bias-disable;
};
};
mux {
groups = "pwm_ao_b";
function = "pwm_ao_b";
+ bias-disable;
};
};
mux {
groups = "pwm_ao_b_6";
function = "pwm_ao_b";
+ bias-disable;
};
};
mux {
groups = "i2s_out_ch23_ao";
function = "i2s_out_ao";
+ bias-disable;
};
};
mux {
groups = "i2s_out_ch45_ao";
function = "i2s_out_ao";
+ bias-disable;
};
};
mux {
groups = "spdif_out_ao_6";
function = "spdif_out_ao";
+ bias-disable;
};
};
mux {
groups = "spdif_out_ao_9";
function = "spdif_out_ao";
+ bias-disable;
};
};
mux {
groups = "ao_cec";
function = "cec_ao";
+ bias-disable;
};
};
mux {
groups = "ee_cec";
function = "cec_ao";
+ bias-disable;
};
};
};
&clkc_AO {
compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
+ clocks = <&xtal>, <&clkc CLKID_CLK81>;
+ clock-names = "xtal", "mpeg-clk";
};
&gpio_intc {
clock-names = "isfr", "iahb", "venci";
};
-&hiubus {
- clkc: clock-controller@0 {
- compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc";
+&sysctrl {
+ clkc: clock-controller {
+ compatible = "amlogic,gxl-clkc";
#clock-cells = <1>;
- reg = <0x0 0x0 0x0 0x3db>;
+ clocks = <&xtal>;
+ clock-names = "xtal";
};
};
"emmc_cmd",
"emmc_clk";
function = "emmc";
+ bias-disable;
};
};
mux {
groups = "emmc_ds";
function = "emmc";
+ bias-disable;
};
};
mux {
groups = "BOOT_8";
function = "gpio_periphs";
- };
- cfg-pull-down {
- pins = "BOOT_8";
bias-pull-down;
};
};
"nor_c",
"nor_cs";
function = "nor";
+ bias-disable;
};
};
- spi_pins: spi {
+ spi_pins: spi-pins {
mux {
groups = "spi_miso",
"spi_mosi",
"spi_sclk";
function = "spi";
+ bias-disable;
};
};
mux {
groups = "spi_ss0";
function = "spi";
+ bias-disable;
};
};
"sdcard_cmd",
"sdcard_clk";
function = "sdcard";
+ bias-disable;
};
};
mux {
groups = "CARD_2";
function = "gpio_periphs";
- };
- cfg-pull-down {
- pins = "CARD_2";
bias-pull-down;
};
};
"sdio_cmd",
"sdio_clk";
function = "sdio";
+ bias-disable;
};
};
mux {
groups = "GPIOX_4";
function = "gpio_periphs";
- };
- cfg-pull-down {
- pins = "GPIOX_4";
bias-pull-down;
};
};
mux {
groups = "sdio_irq";
function = "sdio";
+ bias-disable;
};
};
groups = "uart_tx_a",
"uart_rx_a";
function = "uart_a";
+ bias-disable;
};
};
groups = "uart_cts_a",
"uart_rts_a";
function = "uart_a";
+ bias-disable;
};
};
groups = "uart_tx_b",
"uart_rx_b";
function = "uart_b";
+ bias-disable;
};
};
groups = "uart_cts_b",
"uart_rts_b";
function = "uart_b";
+ bias-disable;
};
};
groups = "uart_tx_c",
"uart_rx_c";
function = "uart_c";
+ bias-disable;
};
};
groups = "uart_cts_c",
"uart_rts_c";
function = "uart_c";
+ bias-disable;
};
};
groups = "i2c_sck_a",
"i2c_sda_a";
function = "i2c_a";
+ bias-disable;
};
};
groups = "i2c_sck_b",
"i2c_sda_b";
function = "i2c_b";
+ bias-disable;
};
};
groups = "i2c_sck_c",
"i2c_sda_c";
function = "i2c_c";
+ bias-disable;
};
};
"eth_txd2",
"eth_txd3";
function = "eth";
+ bias-disable;
};
};
mux {
groups = "eth_link_led";
function = "eth_led";
+ bias-disable;
};
};
mux {
groups = "pwm_a";
function = "pwm_a";
+ bias-disable;
};
};
mux {
groups = "pwm_b";
function = "pwm_b";
+ bias-disable;
};
};
mux {
groups = "pwm_c";
function = "pwm_c";
+ bias-disable;
};
};
mux {
groups = "pwm_d";
function = "pwm_d";
+ bias-disable;
};
};
mux {
groups = "pwm_e";
function = "pwm_e";
+ bias-disable;
};
};
mux {
groups = "pwm_f_clk";
function = "pwm_f";
+ bias-disable;
};
};
mux {
groups = "pwm_f_x";
function = "pwm_f";
+ bias-disable;
};
};
mux {
groups = "hdmi_hpd";
function = "hdmi_hpd";
+ bias-disable;
};
};
mux {
groups = "hdmi_sda", "hdmi_scl";
function = "hdmi_i2c";
+ bias-disable;
};
};
mux {
groups = "i2s_am_clk";
function = "i2s_out";
+ bias-disable;
};
};
mux {
groups = "i2s_out_ao_clk";
function = "i2s_out";
+ bias-disable;
};
};
mux {
groups = "i2s_out_lr_clk";
function = "i2s_out";
+ bias-disable;
};
};
mux {
groups = "i2s_out_ch01";
function = "i2s_out";
+ bias-disable;
};
};
i2sout_ch23_z_pins: i2sout_ch23_z {
mux {
groups = "i2sout_ch23_z";
function = "i2s_out";
+ bias-disable;
};
};
mux {
groups = "i2sout_ch45_z";
function = "i2s_out";
+ bias-disable;
};
};
mux {
groups = "i2sout_ch67_z";
function = "i2s_out";
+ bias-disable;
};
};
mux {
groups = "spdif_out_h";
function = "spdif_out";
+ bias-disable;
};
};
};
<&clkc CLKID_SD_EMMC_A_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
+ resets = <&reset RESET_SD_EMMC_A>;
};
&sd_emmc_b {
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
+ clock-names = "core", "clkin0", "clkin1";
+ resets = <&reset RESET_SD_EMMC_B>;
};
&sd_emmc_c {
<&clkc CLKID_SD_EMMC_C_CLK0>,
<&clkc CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
+ resets = <&reset RESET_SD_EMMC_C>;
};
&spicc {
};
&uart_AO {
- clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
+ clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
&uart_AO_B {
- clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
+ clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
projects / oweals / u-boot.git / blobdiff