Merge git://git.denx.de/u-boot-dm

[oweals/u-boot.git] / arch / arm / dts / ls1021a.dtsi

diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 119b1afeb7f1d2b6b182ac42fc71746857938bc3..c40d87cdf8ce802d161695ccc981fbbbc22eccf1 100644 (file)
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -176,6 +176,7 @@
                        #size-cells = <0>;
                        reg = <0x1550000 0x10000>,
                                <0x40000000 0x4000000>;
+                       reg-names = "QuadSPI", "QuadSPI-memory";
                        num-cs = <2>;
                        big-endian;
                        status = "disabled";
@@ -373,5 +374,36 @@
                        interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
                        dr_mode = "host";
                };
+
+               pcie@3400000 {
+                       compatible = "fsl,ls-pcie", "snps,dw-pcie";
+                       reg = <0x03400000 0x20000   /* dbi registers */
+                              0x01570000 0x10000   /* pf controls registers */
+                              0x24000000 0x20000>; /* configuration space */
+                       reg-names = "dbi", "ctrl", "config";
+                       big-endian;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x24020000 0x0 0x00010000   /* downstream I/O */
+                                 0x82000000 0x0 0x28000000 0x28000000 0x0 0x08000000>; /* non-prefetchable memory */
+               };
+
+               pcie@3500000 {
+                       compatible = "fsl,ls-pcie", "snps,dw-pcie";
+                       reg = <0x03500000 0x10000    /* dbi registers */
+                              0x01570000 0x10000    /* pf controls registers */
+                              0x34000000 0x20000>;  /* configuration space */
+                       reg-names = "dbi", "ctrl", "config";
+                       big-endian;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       num-lanes = <2>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x34020000 0x0 0x00010000   /* downstream I/O */
+                                 0x82000000 0x0 0x38000000 0x38000000 0x0 0x08000000>; /* non-prefetchable memory */
+               };
        };
 };