arm: zynq: Remove ethernet alias for topic-miami

[oweals/u-boot.git] / arch / arm / dts / ls1021a.dtsi

diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 8b3c55776df19327ae80422ec7dcd8977c2525a1..c40d87cdf8ce802d161695ccc981fbbbc22eccf1 100644 (file)
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -170,6 +170,18 @@
                        status = "disabled";
                };
 
+               qspi: quadspi@1550000 {
+                       compatible = "fsl,vf610-qspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x1550000 0x10000>,
+                               <0x40000000 0x4000000>;
+                       reg-names = "QuadSPI", "QuadSPI-memory";
+                       num-cs = <2>;
+                       big-endian;
+                       status = "disabled";
+               };
+
                i2c0: i2c@2180000 {
                        compatible = "fsl,vf610-i2c";
                        #address-cells = <1>;
@@ -207,7 +219,6 @@
                        compatible = "fsl,16550-FIFO64", "ns16550a";
                        reg = <0x21c0500 0x100>;
                        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
-                       clock-frequency = <0>;
                        fifo-size = <15>;
                        status = "disabled";
                };
@@ -216,7 +227,6 @@
                        compatible = "fsl,16550-FIFO64", "ns16550a";
                        reg = <0x21c0600 0x100>;
                        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
-                       clock-frequency = <0>;
                        fifo-size = <15>;
                        status = "disabled";
                };
@@ -225,7 +235,6 @@
                        compatible = "fsl,16550-FIFO64", "ns16550a";
                        reg = <0x21d0500 0x100>;
                        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
-                       clock-frequency = <0>;
                        fifo-size = <15>;
                        status = "disabled";
                };
@@ -234,7 +243,6 @@
                        compatible = "fsl,16550-FIFO64", "ns16550a";
                        reg = <0x21d0600 0x100>;
                        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
-                       clock-frequency = <0>;
                        fifo-size = <15>;
                        status = "disabled";
                };
@@ -361,10 +369,41 @@
                };
 
                usb3@3100000 {
-                       compatible = "snps,dwc3";
+                       compatible = "fsl,layerscape-dwc3";
                        reg = <0x3100000 0x10000>;
                        interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
                        dr_mode = "host";
                };
+
+               pcie@3400000 {
+                       compatible = "fsl,ls-pcie", "snps,dw-pcie";
+                       reg = <0x03400000 0x20000   /* dbi registers */
+                              0x01570000 0x10000   /* pf controls registers */
+                              0x24000000 0x20000>; /* configuration space */
+                       reg-names = "dbi", "ctrl", "config";
+                       big-endian;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x24020000 0x0 0x00010000   /* downstream I/O */
+                                 0x82000000 0x0 0x28000000 0x28000000 0x0 0x08000000>; /* non-prefetchable memory */
+               };
+
+               pcie@3500000 {
+                       compatible = "fsl,ls-pcie", "snps,dw-pcie";
+                       reg = <0x03500000 0x10000    /* dbi registers */
+                              0x01570000 0x10000    /* pf controls registers */
+                              0x34000000 0x20000>;  /* configuration space */
+                       reg-names = "dbi", "ctrl", "config";
+                       big-endian;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       num-lanes = <2>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x34020000 0x0 0x00010000   /* downstream I/O */
+                                 0x82000000 0x0 0x38000000 0x38000000 0x0 0x08000000>; /* non-prefetchable memory */
+               };
        };
 };