Merge branch 'master' of git://git.denx.de/u-boot

[oweals/u-boot.git] / arch / arm / dts / k3-j721e-r5-common-proc-board.dts

diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 28a355d49c9b10af64bb28a1bbe9c59b993c73b0..2dde65d9681dca15cb9a4cc9f5469ea05d067728 100644 (file)
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -13,6 +13,8 @@
        aliases {
                remoteproc0 = &sysctrler;
                remoteproc1 = &a72_0;
+               remoteproc2 = &main_r5fss0_core0;
+               remoteproc3 = &main_r5fss0_core1;
        };
 
        chosen {
@@ -34,12 +36,19 @@
                u-boot,dm-spl;
        };
 
-       clk_200mhz: dummy_clock {
+       clk_200mhz: dummy_clock_200mhz {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <200000000>;
                u-boot,dm-spl;
        };
+
+       clk_19_2mhz: dummy_clock_19_2mhz {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <19200000>;
+               u-boot,dm-spl;
+       };
 };
 
 &cbass_mcu_wakeup {
@@ -68,6 +77,15 @@
        };
 };
 
+&cbass_main {
+       main_esm: esm@700000 {
+               compatible = "ti,j721e-esm";
+               reg = <0x0 0x700000 0x0 0x1000>;
+               ti,esm-pins = <344>, <345>;
+               u-boot,dm-spl;
+       };
+};
+
 &dmsc {
        mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
        mbox-names = "tx", "rx", "notify";
@@ -100,6 +118,36 @@
                        J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
                >;
        };
+
+       mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
+                       J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0)  /* MCU_OSPI0_DQS */
+                       J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* MCU_OSPI0_D0 */
+                       J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* MCU_OSPI0_D1 */
+                       J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* MCU_OSPI0_D2 */
+                       J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* MCU_OSPI0_D3 */
+                       J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* MCU_OSPI0_D4 */
+                       J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* MCU_OSPI0_D5 */
+                       J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* MCU_OSPI0_D6 */
+                       J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* MCU_OSPI0_D7 */
+                       J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
+               >;
+       };
+
+       mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
+               u-boot,dm-spl;
+               pinctrl-single,pins = <
+                       J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
+                       J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
+                       J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
+                       J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
+                       J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
+                       J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
+                       J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
+                       J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
+               >;
+       };
 };
 
 &main_pmx0 {
@@ -133,6 +181,13 @@
                        J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
                >;
        };
+
+       main_i2c0_pins_default: main-i2c0-pins-default {
+               pinctrl-single,pins = <
+                       J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
+                       J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
+               >;
+       };
 };
 
 &wkup_uart0 {
@@ -143,9 +198,13 @@
 };
 
 &mcu_uart0 {
+       /delete-property/ power-domains;
+       /delete-property/ clocks;
+       /delete-property/ clock-names;
        pinctrl-names = "default";
        pinctrl-0 = <&mcu_uart0_pins_default>;
        status = "okay";
+       clock-frequency = <48000000>;
 };
 
 &main_uart0 {
@@ -207,4 +266,83 @@
        u-boot,dm-spl;
 };
 
+&usbss0 {
+       /delete-property/ power-domains;
+       /delete-property/ assigned-clocks;
+       /delete-property/ assigned-clock-parents;
+       clocks = <&clk_19_2mhz>;
+       clock-names = "usb2_refclk";
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_usbss0_pins_default>;
+       ti,vbus-divider;
+};
+
+&main_i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_i2c0_pins_default>;
+       clock-frequency = <400000>;
+
+       exp1: gpio@20 {
+               compatible = "ti,tca6416";
+               reg = <0x20>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       exp2: gpio@22 {
+               compatible = "ti,tca6424";
+               reg = <0x22>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+};
+
+&ospi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
+
+       reg = <0x0 0x47040000 0x0 0x100>,
+             <0x0 0x50000000 0x0 0x8000000>;
+
+       flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <8>;
+               spi-max-frequency = <50000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+       };
+};
+
+&ospi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
+       u-boot,dm-spl;
+
+       reg = <0x0 0x47050000 0x0 0x100>,
+             <0x0 0x58000000 0x0 0x8000000>;
+
+       flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <40000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <2>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               u-boot,dm-spl;
+       };
+};
+
 #include "k3-j721e-common-proc-board-u-boot.dtsi"