ARM: imx: pico-imx8mq: Add support for Technexion Pico-iMX8MQ
[oweals/u-boot.git] / arch / arm / dts / k3-j721e-mcu-wakeup.dtsi
index 5dd07ac4daf7380ba8897332506d47bc1f30cb06..2eed50aa5a4c2e993501285efff3c00c4d703f15 100644 (file)
                        assigned-clocks = <&k3_clks 102 0>;
                        assigned-clock-rates = <250000000>;
                };
+
+               ospi0: spi@47040000 {
+                       compatible = "ti,am654-ospi";
+                       reg = <0x0 0x47040000 0x0 0x100>,
+                               <0x5 0x00000000 0x1 0x0000000>;
+                       interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
+                       cdns,fifo-depth = <256>;
+                       cdns,fifo-width = <4>;
+                       cdns,trigger-address = <0x0>;
+                       clocks = <&k3_clks 103 0>;
+                       assigned-clocks = <&k3_clks 103 0>;
+                       assigned-clock-parents = <&k3_clks 103 2>;
+                       assigned-clock-rates = <166666666>;
+                       power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               ospi1: spi@47050000 {
+                       compatible = "ti,am654-ospi";
+                       reg = <0x0 0x47050000 0x0 0x100>,
+                               <0x7 0x00000000 0x1 0x00000000>;
+                       interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>;
+                       cdns,fifo-depth = <256>;
+                       cdns,fifo-width = <4>;
+                       cdns,trigger-address = <0x0>;
+                       clocks = <&k3_clks 104 0>;
+                       assigned-clocks = <&k3_clks 104 0>;
+                       assigned-clock-rates = <133333333>;
+                       power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+
+       mcu_i2c0: i2c@40b00000 {
+               compatible = "ti,j721e-i2c", "ti,omap4-i2c";
+               reg = <0x0 0x40b00000 0x0 0x100>;
+               interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clock-names = "fck";
+               clocks = <&k3_clks 194 0>;
+               power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
+       };
+
+       mcu_i2c1: i2c@40b10000 {
+               compatible = "ti,j721e-i2c", "ti,omap4-i2c";
+               reg = <0x0 0x40b10000 0x0 0x100>;
+               interrupts = <GIC_SPI 853 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               clock-names = "fck";
+               clocks = <&k3_clks 195 0>;
+               power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
        };
 };