arm: dts: rockchip: px30: add and enable rng node
[oweals/u-boot.git] / arch / arm / dts / k3-am654-r5-base-board.dts
index 5c110ef9ddea1aa85e932d6ae05f5c60d8112b7e..e6b78643c197239ed66e17437e030bcf1112d7de 100644 (file)
        wkup_vtm0: wkup_vtm@42050000 {
                compatible = "ti,am654-vtm", "ti,am654-avs";
                reg = <0x42050000 0x25c>;
-               power-domains = <&k3_pds 80>;
+               power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
                #thermal-sensor-cells = <1>;
        };
 
                        AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
                >;
        };
+
+       mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
+               pinctrl-single,pins = <
+                       AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
+                       AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)   /* (U2) MCU_OSPI0_DQS */
+                       AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */
+                       AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */
+                       AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */
+                       AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */
+                       AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */
+                       AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */
+                       AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */
+                       AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */
+                       AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
+               >;
+       };
 };
 
 &main_pmx0 {
                u-boot,dm-spl;
        };
 };
+
+&ospi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
+
+       reg = <0x0 0x47040000 0x0 0x100>,
+             <0x0 0x50000000 0x0 0x8000000>;
+
+       flash@0{
+               compatible = "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <8>;
+               spi-max-frequency = <50000000>;
+               cdns,tshsl-ns = <60>;
+               cdns,tsd2d-ns = <60>;
+               cdns,tchsh-ns = <60>;
+               cdns,tslch-ns = <60>;
+               cdns,read-delay = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+       };
+};