ARM: imx: pico-imx8mq: Add support for Technexion Pico-iMX8MQ

[oweals/u-boot.git] / arch / arm / dts / k3-am65.dtsi

diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi
index 3d4bf369d0304a3afb8bcb43e18ca1eeb2648413..3d89bf32a9d14356c1abd1d7503cb5c55e3ac607 100644 (file)
--- a/arch/arm/dts/k3-am65.dtsi
+++ b/arch/arm/dts/k3-am65.dtsi
@@ -8,6 +8,8 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/k3.h>
+#include <dt-bindings/soc/ti,sci_pm_domain.h>
 
 / {
        model = "Texas Instruments K3 AM654 SoC";
@@ -22,6 +24,14 @@
                serial2 = &main_uart0;
                serial3 = &main_uart1;
                serial4 = &main_uart2;
+               i2c0 = &wkup_i2c0;
+               i2c1 = &mcu_i2c0;
+               i2c2 = &main_i2c0;
+               i2c3 = &main_i2c1;
+               i2c4 = &main_i2c2;
+               i2c5 = &main_i2c3;
+               spi0 = &ospi0;
+               spi1 = &ospi1;
        };
 
        chosen { };
@@ -61,13 +71,21 @@
                         <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
                         <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
                         <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
+                        <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
                         /* MCUSS Range */
                         <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
                         <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
+                        <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>,
+                        <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>,
+                        <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>,
                         <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,
                         <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,
                         <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
-                        <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>;
+                        <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
+                        <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>,
+                        <0x00 0x70000000 0x00 0x70000000 0x00 0x200000>,
+                        <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>,
+                        <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>;
 
                cbass_mcu: interconnect@28380000 {
                        compatible = "simple-bus";
@@ -75,10 +93,16 @@
                        #size-cells = <2>;
                        ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS*/
                                 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>, /* First peripheral window */
+                                <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
+                                <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
+                                <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */
                                 <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */
                                 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */
                                 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */
-                                <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; /* OSPI space 1 */
+                                <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI space 1 */
+                                <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, /*  FSS OSPI0 data region 1 */
+                                <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/
+                                <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/
 
                        cbass_wakeup: interconnect@42040000 {
                                compatible = "simple-bus";