arm64: zynqmp: Add reset-controller support in serdes driver
[oweals/u-boot.git] / arch / arm / dts / imx6ul-isiot.dtsi
index 1a474ca2177ffefd6ffd9f72407ece26f8234ee8..5007a88f45ed4a77398c49a1965dd2fea5bae714 100644 (file)
@@ -40,8 +40,6 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-/dts-v1/;
-
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include "imx6ul.dtsi"
        };
 };
 
+&fec1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet1>;
+       phy-mode = "rmii";
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <100000>;
        pinctrl-names = "default";
@@ -77,6 +82,7 @@
 };
 
 &usdhc1 {
+       u-boot,dm-spl;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc1>;
        cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
 };
 
 &iomuxc {
+       pinctrl_enet1: enet1grp {
+               fsl,pins = <
+                       MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO    0x1b0b0
+                       MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC     0x1b0b0
+                       MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
+                       MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+                       MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
+                       MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
+                       MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10       0x1b0b0
+               >;
+       };
+
        pinctrl_i2c1: i2c1grp {
                fsl,pins = <
                        MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
        };
 
        pinctrl_usdhc1: usdhc1grp {
+               u-boot,dm-spl;
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059