ARM: dts: rmobile: Add rudimentary R8A7790 Stout DT

[oweals/u-boot.git] / arch / arm / dts / imx6ul-geam-kit.dts

diff --git a/arch/arm/dts/imx6ul-geam-kit.dts b/arch/arm/dts/imx6ul-geam-kit.dts
index a039b6d5577df40b5132b8b2615aff153189e8ad..15e3f9415383b06f40ab94aa398876b65e25da0b 100644 (file)
--- a/arch/arm/dts/imx6ul-geam-kit.dts
+++ b/arch/arm/dts/imx6ul-geam-kit.dts
@@ -59,6 +59,27 @@
        };
 };
 
+&fec1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet1>;
+       phy-mode = "rmii";
+       status = "okay";
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+};
+
+&i2c2 {
+       clock_frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+};
+
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
@@ -66,6 +87,7 @@
 };
 
 &usdhc1 {
+       u-boot,dm-spl;
        pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc1>;
        pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
@@ -77,6 +99,34 @@
 };
 
 &iomuxc {
+       pinctrl_enet1: enet1grp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
+                       MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
+                       MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
+                       MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+                       MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
+                       MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+                       MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+                       MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+                       fsl,pins = <
+                       MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+                       MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+               >;
+       };
+
        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
@@ -85,6 +135,7 @@
        };
 
        pinctrl_usdhc1: usdhc1grp {
+               u-boot,dm-spl;
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10059
@@ -96,6 +147,7 @@
        };
 
        pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+               u-boot,dm-spl;
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
@@ -107,6 +159,7 @@
        };
 
        pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+               u-boot,dm-spl;
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9