Merge tag 'rockchip-for-v2019.07-rc5' of https://gitlab.denx.de/u-boot/custodians...
[oweals/u-boot.git] / arch / arm / dts / imx6qdl-icore-rqs.dtsi
index 816cdce2f36c4150d8c15b3bcf48c1afad2f1602..d797a034f760bd13e9ed4c38bb56c2e82804d213 100644 (file)
 };
 
 &usdhc3 {
-       u-boot,dm-spl;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc3>;
        cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
 };
 
 &usdhc4 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc4>;
+       pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
+       bus-witdh = <8>;
        no-1-8-v;
+       non-removable;
        status = "okay";
 };
 
        };
 
        pinctrl_usdhc3: usdhc3grp {
-               u-boot,dm-spl;
                fsl,pins = <
                        MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17070
                        MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10070
                        MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
                >;
        };
+
+       pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
+               fsl,pins = <
+                       MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170B1
+                       MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100B1
+                       MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
+                       MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
+                       MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
+                       MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
+                       MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
+                       MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
+                       MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
+                       MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
+               >;
+       };
+
+       pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
+               fsl,pins = <
+                       MX6QDL_PAD_SD4_CMD__SD4_CMD    0x170F9
+                       MX6QDL_PAD_SD4_CLK__SD4_CLK    0x100F9
+                       MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
+                       MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
+                       MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
+                       MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
+                       MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
+                       MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
+                       MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
+                       MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
+               >;
+       };
+
 };