/ {
aliases {
ipu1 = &ipu2;
+ video1 = &ipu2;
spi4 = &ecspi5;
};
<&clks IMX6QDL_CLK_GPU2D_CORE>;
clock-names = "bus", "core";
power-domains = <&pd_pu>;
+ #cooling-cells = <2>;
};
ipu2: ipu@2800000 {
};
ipu2_di0: port@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <2>;
ipu2_di0_disp0: endpoint@0 {
};
ipu2_di1: port@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <3>;
ipu2_di1_hdmi: endpoint@1 {