arm: dts: ls1028a: add lpuart nodes

[oweals/u-boot.git] / arch / arm / dts / fsl-ls2080a-qds.dts

diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b/arch/arm/dts/fsl-ls2080a-qds.dts
index 547ec278376910b6b5cde92aae91d97a9fd12cfb..13461b5c4580782e77b07aa0a37ed09fc2cb0c85 100644 (file)
--- a/arch/arm/dts/fsl-ls2080a-qds.dts
+++ b/arch/arm/dts/fsl-ls2080a-qds.dts
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
  * Freescale ls2080a QDS board device tree source
  *
  * Copyright 2013-2015 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /dts-v1/;
@@ -15,10 +14,30 @@
        compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
 
        aliases {
+               spi0 = &qspi;
                spi1 = &dspi;
        };
 };
 
+&i2c0 {
+       status = "okay";
+       pca9547@77 {
+               compatible = "nxp,pca9547";
+               reg = <0x77>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x00>;
+                       rtc@68 {
+                               compatible = "dallas,ds3232";
+                               reg = <0x68>;
+                       };
+               };
+       };
+};
+
 &dspi {
        bus-num = <0>;
        status = "okay";
@@ -26,7 +45,7 @@
        dflash0: n25q128a {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <3000000>;
                spi-cpol;
                spi-cpha;
@@ -35,7 +54,7 @@
        dflash1: sst25wf040b {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <3000000>;
                spi-cpol;
                spi-cpha;
@@ -44,10 +63,27 @@
        dflash2: en25s64 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <3000000>;
                spi-cpol;
                spi-cpha;
                reg = <2>;
        };
 };
+
+&qspi {
+       bus-num = <0>;
+       status = "okay";
+
+       qflash0: s25fs256s@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+       };
+};
+
+&sata {
+       status = "okay";
+};