ARM: dts: sama5d2: Add uart4 definition
[oweals/u-boot.git] / arch / arm / dts / fsl-ls1088a.dtsi
index 077caf3cc21ade6c02d3dd371c9b7a94c387b9ad..abc8b21a112e99edb195cdc83ba6576a7cfb8b19 100644 (file)
                             <1 10 0x8>; /* Hypervisor PPI, active-low */
        };
 
+       i2c0: i2c@2000000 {
+               compatible = "fsl,vf610-i2c";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x0 0x2000000 0x0 0x10000>;
+               interrupts = <0 34 4>;
+       };
+
+       i2c1: i2c@2010000 {
+               compatible = "fsl,vf610-i2c";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x0 0x2010000 0x0 0x10000>;
+               interrupts = <0 34 4>;
+       };
+
+       i2c2: i2c@2020000 {
+               compatible = "fsl,vf610-i2c";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x0 0x2020000 0x0 0x10000>;
+               interrupts = <0 35 4>;
+       };
+
+       i2c3: i2c@2030000 {
+               compatible = "fsl,vf610-i2c";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x0 0x2030000 0x0 0x10000>;
+               interrupts = <0 35 4>;
+       };
+
        serial0: serial@21c0500 {
                device_type = "serial";
                compatible = "fsl,ns16550", "ns16550a";
                reg-names = "QuadSPI", "QuadSPI-memory";
                num-cs = <4>;
        };
+
+       esdhc: esdhc@2140000 {
+               compatible = "fsl,esdhc";
+               reg = <0x0 0x2140000 0x0 0x10000>;
+               interrupts = <0 28 0x4>; /* Level high type */
+               little-endian;
+               bus-width = <4>;
+       };
+
        ifc: ifc@1530000 {
                compatible = "fsl,ifc", "simple-bus";
                reg = <0x0 0x2240000 0x0 0x20000>;
                ranges = <0x81000000 0x0 0x00000000 0x30 0x00020000 0x0 0x00010000   /* downstream I/O */
                          0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
        };
+
+       sata: sata@3200000 {
+               compatible = "fsl,ls1088a-ahci";
+               reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
+                      0x7 0x100520  0x0 0x4>;   /* ecc sata addr*/
+               reg-names = "sata-base", "ecc-addr";
+               interrupts = <0 133 4>;
+               status = "disabled";
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
 };