rockchip: rk3328: rock64 - fix gen3 SPL hang
[oweals/u-boot.git] / arch / arm / dts / fsl-ls1046a-rdb.dts
index a05c9e9b9ea0ee33e4f89a7445514037c92ad261..464129291c91d43fb86a4a7c8e1e1fe3a193bb06 100644 (file)
@@ -3,6 +3,7 @@
  * Device Tree Include file for Freescale Layerscape-1046A family SoC.
  *
  * Copyright 2016, Freescale Semiconductor
+ * Copyright 2020 NXP
  *
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
 };
 
 &qspi {
-       bus-num = <0>;
        status = "okay";
 
-       qflash0: s25fs512s@0 {
+       s25fs512s0: flash@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "jedec,spi-nor";
@@ -31,7 +31,7 @@
                reg = <0>;
        };
 
-       qflash1: s25fs512s@1 {
+       s25fs512s1: flash@1 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "jedec,spi-nor";
 &sata {
        status = "okay";
 };
+
+&i2c0 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+#include "fsl-ls1046-post.dtsi"
+
+&fman0 {
+       ethernet@e4000 {
+               phy-handle = <&rgmii_phy1>;
+               phy-connection-type = "rgmii-id";
+               status = "okay";
+       };
+
+       ethernet@e6000 {
+               phy-handle = <&rgmii_phy2>;
+               phy-connection-type = "rgmii-id";
+               status = "okay";
+       };
+
+       ethernet@e8000 {
+               phy-handle = <&sgmii_phy1>;
+               phy-connection-type = "sgmii";
+               status = "okay";
+       };
+
+       ethernet@ea000 {
+               phy-handle = <&sgmii_phy2>;
+               phy-connection-type = "sgmii";
+               status = "okay";
+       };
+
+       ethernet@f0000 { /* 10GEC1 */
+               phy-handle = <&aqr106_phy>;
+               phy-connection-type = "xgmii";
+               status = "okay";
+       };
+
+       ethernet@f2000 { /* 10GEC2 */
+               fixed-link = <0 1 1000 0 0>;
+               phy-connection-type = "xgmii";
+               status = "okay";
+       };
+
+       mdio@fc000 {
+               rgmii_phy1: ethernet-phy@1 {
+                       reg = <0x1>;
+               };
+
+               rgmii_phy2: ethernet-phy@2 {
+                       reg = <0x2>;
+               };
+
+               sgmii_phy1: ethernet-phy@3 {
+                       reg = <0x3>;
+               };
+
+               sgmii_phy2: ethernet-phy@4 {
+                       reg = <0x4>;
+               };
+       };
+
+       mdio@fd000 {
+               aqr106_phy: ethernet-phy@0 {
+                       compatible = "ethernet-phy-ieee802.3-c45";
+                       interrupts = <0 131 4>;
+                       reg = <0x0>;
+               };
+       };
+};