arm: dts: rockchip: px30: add and enable rng node

[oweals/u-boot.git] / arch / arm / dts / fsl-ls1012a-qds.dtsi

diff --git a/arch/arm/dts/fsl-ls1012a-qds.dtsi b/arch/arm/dts/fsl-ls1012a-qds.dtsi
index dde71346266261d29dcae40afd638c218f2029a1..a330597b6c047ed3969fd7d7cf64dabd66583fbd 100644 (file)
--- a/arch/arm/dts/fsl-ls1012a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1012a-qds.dtsi
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
  * Copyright 2016 Freescale Semiconductor
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /include/ "fsl-ls1012a.dtsi"
@@ -21,7 +20,7 @@
        dflash0: n25q128a {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                reg = <0>;
                spi-max-frequency = <1000000>; /* input clock */
        };
@@ -29,7 +28,7 @@
        dflash1: sst25wf040b {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <3500000>;
                reg = <1>;
        };
@@ -37,7 +36,7 @@
        dflash2: en25s64 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <3500000>;
                reg = <2>;
        };
@@ -50,7 +49,7 @@
        qflash0: s25fl128s@0 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "spi-flash";
+               compatible = "jedec,spi-nor";
                spi-max-frequency = <20000000>;
                reg = <0>;
        };
@@ -121,3 +120,12 @@
 &duart0 {
        status = "okay";
 };
+
+&usb0 {
+       status = "okay";
+       phy_type = "ulpi";
+};
+
+&sata {
+       status = "okay";
+};