Merge https://gitlab.denx.de/u-boot/custodians/u-boot-clk

[oweals/u-boot.git] / arch / arm / dts / exynos5.dtsi

diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi
index a2b533a1368ccb503701cb8c77eeaf7f092c37c7..cdc965d90dada4dbe931645ea39bf4229bf07655 100644 (file)
--- a/arch/arm/dts/exynos5.dtsi
+++ b/arch/arm/dts/exynos5.dtsi
@@ -1,15 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (c) 2013 The Chromium OS Authors
  * SAMSUNG EXYNOS5 SoC device tree source
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        compatible = "samsung,exynos5";
 
+       interrupt-parent = <&gic>;
+
+       combiner: interrupt-controller@10440000 {
+               compatible = "samsung,exynos4210-combiner";
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               samsung,combiner-nr = <32>;
+               reg = <0x10440000 0x1000>;
+               interrupts =    <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
+                               <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
+                               <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
+                               <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
+                               <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
+                               <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
+                               <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
+                               <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+       };
+
+       gic: interrupt-controller@10481000 {
+               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+               #interrupt-cells = <3>;
+               interrupt-controller;
+               reg =   <0x10481000 0x1000>,
+                       <0x10482000 0x1000>,
+                       <0x10484000 0x2000>,
+                       <0x10486000 0x2000>;
+               interrupts = <1 9 0xf04>;
+       };
+
        sromc@12250000 {
                compatible = "samsung,exynos-sromc";
                reg = <0x12250000 0x20>;
@@ -17,39 +46,39 @@
                #size-cells = <0>;
        };
 
-       i2c@12c60000 {
-               #address-cells = <1>;
-               #size-cells = <0>;
+       i2c_0: i2c@12C60000 {
                compatible = "samsung,s3c2440-i2c";
                reg = <0x12C60000 0x100>;
                interrupts = <0 56 0>;
-       };
-
-       i2c@12c70000 {
                #address-cells = <1>;
                #size-cells = <0>;
+       };
+
+       i2c_1: i2c@12C70000 {
                compatible = "samsung,s3c2440-i2c";
                reg = <0x12C70000 0x100>;
                interrupts = <0 57 0>;
-       };
-
-       i2c@12c80000 {
                #address-cells = <1>;
                #size-cells = <0>;
+       };
+
+       i2c_2: i2c@12C80000 {
                compatible = "samsung,s3c2440-i2c";
                reg = <0x12C80000 0x100>;
                interrupts = <0 58 0>;
-       };
-
-       i2c@12c90000 {
                #address-cells = <1>;
                #size-cells = <0>;
+       };
+
+       i2c_3: i2c@12C90000 {
                compatible = "samsung,s3c2440-i2c";
                reg = <0x12C90000 0x100>;
                interrupts = <0 59 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
        };
 
-       spi@12d20000 {
+       spi_0: spi@12d20000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos-spi";
@@ -57,7 +86,7 @@
                interrupts = <0 68 0>;
        };
 
-       spi@12d30000 {
+       spi_1: spi@12d30000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos-spi";
@@ -65,7 +94,7 @@
                interrupts = <0 69 0>;
        };
 
-       spi@12d40000 {
+       spi_2: spi@12d40000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos-spi";
@@ -74,7 +103,7 @@
                interrupts = <0 70 0>;
         };
 
-       spi@131a0000 {
+       spi_3: spi@131a0000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos-spi";
@@ -82,7 +111,7 @@
                interrupts = <0 129 0>;
        };
 
-       spi@131b0000 {
+       spi_4: spi@131b0000 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "samsung,exynos-spi";
@@ -108,17 +137,16 @@
        };
 
        fimd@14400000 {
+               u-boot,dm-pre-reloc;
                compatible = "samsung,exynos-fimd";
                reg = <0x14400000 0x10000>;
                #address-cells = <1>;
                #size-cells = <1>;
        };
 
-       dp@145b0000 {
+       dp: dp@145b0000 {
                compatible = "samsung,exynos5-dp";
                reg = <0x145b0000 0x1000>;
-               #address-cells = <1>;
-               #size-cells = <1>;
        };
 
        xhci0: xhci@12000000 {
@@ -190,9 +218,7 @@
                compatible = "samsung,exynos4210-uart";
                reg = <0x12C30000 0x100>;
                interrupts = <0 54 0>;
+               u-boot,dm-pre-reloc;
                id = <3>;
        };
-
-       gpio: gpio {
-       };
 };