Merge https://gitlab.denx.de/u-boot/custodians/u-boot-clk

[oweals/u-boot.git] / arch / arm / dts / armada-xp-theadorable.dts

diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts
index 065e4434175a33e03e5c988d80eafc0eb0c99fa6..5b18d62c3c5f1d22040421aaf5133abb7a3907ff 100644 (file)
--- a/arch/arm/dts/armada-xp-theadorable.dts
+++ b/arch/arm/dts/armada-xp-theadorable.dts
@@ -126,39 +126,79 @@
                                status = "okay";
                        };
 
-                       spi0: spi@10600 {
+                       /* The LCD controller is only used on this board */
+                       lcd0: lcd-controller@e0000 {
+                               compatible = "marvell,armada-xp-lcd";
+                               reg = <0xe0000 0x10000>;
                                status = "okay";
                                u-boot,dm-pre-reloc;
 
-                               spi-flash@0 {
-                                       u-boot,dm-pre-reloc;
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-                                       compatible = "n25q128a13", "jedec,spi-nor", "spi-flash";
-                                       reg = <0>; /* Chip select 0 */
-                                       spi-max-frequency = <27777777>;
-                               };
-
-                               fpga@1 {
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-                                       compatible = "spi-generic-device";
-                                       reg = <1>; /* Chip select 1 */
-                                       spi-max-frequency = <27777777>;
+                               display-timings {
+                                       native-mode = <&timing0>;
+                                       timing0: panel0 {
+                                               hactive = <240>;
+                                               vactive = <320>;
+                                               hfront-porch = <1>;
+                                               hback-porch = <45>;
+                                               vfront-porch = <1>;
+                                               vback-porch = <3>;
+
+                                               /* Some dummy parameters */
+                                               clock-frequency = <0>;
+                                               hsync-len = <0>;
+                                               vsync-len = <0>;
+                                       };
                                };
                        };
+               };
+       };
+};
 
-                       spi1: spi@10680 {
-                               status = "okay";
+&spi0 {
+       status = "okay";
+       u-boot,dm-pre-reloc;
+
+       spi-flash@0 {
+               u-boot,dm-pre-reloc;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "n25q128a13", "jedec,spi-nor";
+               reg = <0>; /* Chip select 0 */
+               spi-max-frequency = <27777777>;
+       };
 
-                               fpga@2 {
-                                       #address-cells = <1>;
-                                       #size-cells = <1>;
-                                       compatible = "spi-generic-device";
-                                       reg = <2>; /* Chip select 2 */
-                                       spi-max-frequency = <27777777>;
-                               };
-                       };
-               };
+       fpga@1 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-generic-device";
+               reg = <1>; /* Chip select 1 */
+               spi-max-frequency = <27777777>;
+       };
+};
+
+&spi1 {
+       status = "okay";
+
+       fpga@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-generic-device";
+               reg = <0>; /* Chip select 0 */
+               spi-max-frequency = <27777777>;
+       };
+};
+
+
+&pciec {
+       status = "okay";
+
+       pcie@1,0 {
+               /* Port 0, Lane 0 */
+               status = "okay";
+       };
+
+       pcie@9,0 {
+               /* Port 2, Lane 0 */
+               status = "okay";
        };
 };